Silicon-on-insulator approach for power IC's integrating verticalDMOS and polycrystalline silicon CMOS thin-film transistors

A novel approach for the monolithic integration of low-voltage logic and analog control circuits with vertical-current flow power transistors is described. This is achieved by fabricating a CMOS device family, using polycrystalline-silicon thin-film transistors (TFTs), on the field oxide of a single-crystal power device. Parasitic interactions between the control and power devices are eliminated in a simple, inexpensive, and easily manufacturable process. The technology is capable of supporting both MOS and bipolar power devices and the presence of the TFT circuits places no restriction on the maximum voltage or current of the power device. The TFTs exhibit good electrical characteristics and the power devices are not compromised by the addition of the TFT control circuits. This concept is demonstrated by the fabrication of a vertical DMOS power transistor with >100-V, >45-A capability, monolithically integrated with current-limiting and temperature-limiting functions     

Bilateral aneurysms of the popliteal artery

INTRODUCTION: Popliteal artery aneurysms are the most common of peripheral arterial aneurysms. Popliteal aneurysms are bilateral in 42% of patients. Atherosclerosis and bacterial invasion of the arterial wall are the predominant etiologic factors of popliteal artery aneurysms. CLINICAL CASE: A male of 67 years old was referred to our institution for bilateral claudication and 150 m. free interval. The angiogram showed a partial occluded aneurysm of the right popliteal artery and a complete thrombosis of the left popliteal artery aneurysms. The left aneurysm was resected and a femoral popliteal by-pass was performed, using the inverted saphenous vein graft, associated with left lumbar sympathectomy. Six months later the contralateral aneurysm was excised and a Dacron femoro-popliteal by-pass graft was performed. Two years later Arteriographic and Doppler examination showed patent by-pass bilaterally. CONCLUSION: Popliteal artery aneurysms can be a threaten for the lower limbs, because of thromboembolic phenomena and occasional rupture. Surgery is the best treatment before the appearance of an acute complication and a by-pass with an autogenous vein graft or a Dacron graft are the most common surgical procedures performed. Thrombolytic therapy offers good results where an acute complication appears.     

Low-cost process for fabricating polysilicon transistors

A process for the fabrication of p-channel polysilicon MOS transistors is described. The process is compatible with the use of low-temperature glass substrates and replaces the use of ion implantation for the source/drain doping with in situ doped polysilicon. MOS transistors made with this process exhibit an on/off current ratio of 2.5×10⁵, a mobility of 16 cm²/V-s, and a subthreshold slope of 1.3 V/decade     

The effect of heavy metal contamination in SIMOX on radiationhardness of MOS transistors

It is shown that heavy metal contamination introduced during implantation of oxygen into silicon results in a reduction of SIMOX (separation by implanted oxygen) oxide radiation hardness. Radiation-induced back-channel leakage currents in MOS transistors processed in SIMOX films containing various levels of heavy metals, as measured by surface photovoltage (SPV), are a strong function of heavy metal concentration. It is concluded that SPV measurements of as-implanted SIMOX wafers can be used as a rapid, nondestructive quality control inspection technique to predict the radiation hardness of the SIMOX oxide prior to processing     

Polysilicon transistors fabricated on plasma-deposited amorphoussilicon

P-channel MOS transistors were fabricated on plasma-enhanced chemical-vapor deposited (PECVD) amorphous silicon films. The films were deposited at temperatures of 425, 450, and 475°C and crystallized at 600°C. Film thicknesses were between 50 and 250 nm. Transistors were also fabricated on 150-nm-thick low-pressure chemical-vapor-deposited (LPCVD) amorphous silicon films deposited at 560°C. A comparison of device characteristics using 150-nm-thick PECVD and LPCVD films shows that the PECVD films deposited at 425°C produced devices with a factor-of-two-higher hole mobility, a factor-of-1.5-lower subthreshold slope, and a factor-of-3.5-higher on-off current ratio. For all film thicknesses tested there was an increase in the hole mobility and on-off current ratio as the PECVD film temperature was decreased     

The effect of 1300-1380°C anneal temperatures and materialcontamination on the characteristics of CMOS/SIMOX devices

The characteristics of CMOS transistors fabrication on silicon implanted with oxygen (SIMOX) materials were measured as a function of the silicon superficial layer contamination levels. In addition, postimplant anneal temperatures of 1300°C, 1350°C, and 1380°C were examined. It is found that the transistor leakage currents as well as the integrity of the gate oxide and implanted SIMOX oxide are functions of the carbon content in the starting material. Leakage currents below 1.0×10^-12 A/μm of channel width have been measured when the carbon concentration is reduced to 2×10¹⁸/cm². In addition, the integrity of the transistor gate dielectric, SIMOX implanted oxide, and oxygen precipitate density are seen to be a function of the postimplant anneal temperature. A gate dielectric breakdown field of 10 MV/cm has been achieved when the postimplant temperature is increased to 1380°C