排序方式: 共有33条查询结果,搜索用时 15 毫秒
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This work investigates stress-induced leakage current (SILC) in thin-oxide MOS capacitors subject to (quasiperiodic) ac voltage stress, under the condition of fixed charge fluence through the oxide. It shows that both trap creation and spontaneous trap annealing play a significant role when the duration of, and the time between, high-voltage pulses are comparable with characteristic times of trap dynamics. A phenomenological model is introduced that is able to accurately represent the main physical phenomena due to pulsed voltage stress under conditions of interest for unconventional programming schemes for fast programming nonvolatile memories (NVMs) with acceptable oxide degradation. 相似文献
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Giuseppina Puzzilli Bogdan Govoreanu Fernanda Irrera Maarten Rosmeulen Jan Van Houdt 《Microelectronics Reliability》2007,47(4-5):508
In this work, charge trapping in SiO2/Al2O3 dielectric stacks is characterized by means of pulsed capacitance–voltage measurements. The proposed technique strongly reduces the measurement time and, as a consequence, the impact of charge trapping on the measurement results. Flat band voltage shift and fast current transient during short stress pulses are systematically monitored and the centroid and the amount of the trapped charge are extracted using a first-order model. 相似文献
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In this work a high-k insulating film is deposited on the SiO2 tunnel oxide of MOS capacitors designed for non-volatile memory applications. The advantages of this approach derive from the asymmetric band diagram, which lowers the Fowler–Nordheim tunnel erase barrier, without affecting the program operation. This results in lower erase voltage and much shorter erase times. In fact, in the proposed structure the erase voltage is about 20% lower and the erase current three thousands times greater than in conventional MOS with pure-SiO2 tunnel oxide and the same equivalent oxide thickness (15 nm). At the same time, the larger physical thickness prevents from charge loss, and guarantees data retention. The goal of such device is to improve the memory performances without degrading reliability. 相似文献
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Solar-blind UV photodetectors for large area applications 总被引:3,自引:0,他引:3
Caputo D. de Cesare G. Irrera F. Palma F. 《Electron Devices, IEEE Transactions on》1996,43(9):1351-1356
In this paper, we extensively investigate a family of solar-blind thin-film photodetectors optimized for the ultraviolet spectrum (UV). The devices are p-i-n structures made of hydrogenated amorphous silicon (a-Si:H) and silicon carbide (a-SiC:H) on a glass substrate. At room temperature the photodetectors exhibit values of quantum efficiency of 20% at λ=187 nm, and are transparent to visible radiation. The excellent sensitivity of the device at short wavelengths is explained within the framework of a diffusive model of transport, taking into account the effects of hot carrier relaxation. The rejection of visible light is obtained with an appropriate design of the energy gap and intrinsic layer thickness. The great advantage of this technology lies in the possibility to produce low-cost, large-area arrays of photodetectors 相似文献
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The influence of irregular index profiles on waveguide dispersion, cutoff wavelength, and modal field diameter in monomode fibers is studied systematically. The authors present an analytical theory, which relies on the fact that for a broad family of profiles (those which contain a term proportional to r -2) the wave equation can be solved exactly. The influence of profile details on dispersion appears to be larger than previously expected 相似文献
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Irrera A Artoni P Iacona F Pecora EF Franzò G Galli M Fazio B Boninelli S Priolo F 《Nanotechnology》2012,23(7):075204
We present a novel approach for the direct synthesis of ultrathin Si nanowires (NWs) exhibiting room temperature light emission. The synthesis is based on a wet etching process assisted by a metal thin film. The thickness-dependent morphology of the metal layer produces uncovered nanometer-size regions which act as precursor sites for NW formation. The process is cheap, fast, maskless and compatible with Si technology. Very dense arrays of long (several micrometers) and small (diameter of 5-9?nm) NWs have been synthesized. An efficient room temperature luminescence, visible with the naked eye, is observed when NWs are optically excited, exhibiting a blue-shift with decreasing NW size in agreement with quantum confinement effects. A prototype device based on Si NWs has been fabricated showing a strong and stable electroluminescence at low voltages. The relevance and the perspectives of the reported results are discussed, opening the route toward novel applications of Si NWs. 相似文献
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In this paper we propose a novel T-shaped shallow trench isolation technology including an unfilled floating void (VSTI). The structure aims to reduce the dark current in CMOS active pixel sensor technology and is optimized with respect to the size of the depletion region surrounding the STI, also accounting for the leakage current.Simulations outline that a large air void positioned far from the bottom and the top of the T-shaped trench improves performances. 相似文献
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Giorgia Franzò 《光电子快报》2007,3(5):321-325
We present the properties and potentialities of light emitting devices based on amorphous Si nanoclusters. Amorphousnanostructures may constitute an interesting alternative to Si nanocrystals for the monolithic integration of optical andelectrical functions in Si technology. In fact, they exhibit an intense room temperature electroluminescence (EL). The ELproperties of these devices have been studied as a function of current and of temperature. Moreover, to improve theextraction efficiency of the light, we have integrated the emitting system with a 2D photonic crystal structure opportunelyfabricated by using conventional optical lithography to reduce the total internal reflection of the emitted light. The extractionefficiency in such devices increases by a factor of 4 at a resonance wavelength. 相似文献