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Stampoulidis L. Kehayas E. Apostolopoulos D. Bakopoulos P. Vyrsokinos K. Avramopoulos H. 《Photonics Technology Letters, IEEE》2007,19(8):538-540
We present a packet-by-packet contention resolution scheme that combines packet detection, optical space switching, and wavelength conversion performed in the optical domain by integrated optical switches. The packet detection circuit provides the control signals required to deflect and wavelength-convert the contending packets so that all the packets are forwarded to the same output without any collision or packet droppings. We demonstrate the compatibility of the scheme with both nonreturn-to-zero (NRZ) and return-to-zero (RZ) modulation formats by recording error-free operation for 10-Gb/s NRZ and 40-Gb/s RZ packet-mode traffic 相似文献
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Stampoulidis L. Kehayas E. Vyrsokinos K. Apostolopoulos D. Avramopoulos H. 《Photonics Technology Letters, IEEE》2006,18(23):2478-2480
We present a new scheme for all-optical contention detection and time-domain contention resolution of optical packets in label-switched routers that employ all-optical label recognition. The contention detection subsystem provides all the necessary control signals required to drive an optically controlled buffer which employs 1 times 2 optical switching elements and an optical fiber delay line. The state of the buffer is dynamically controlled on a per-packet basis with all the decisions and processing performed in the optical domain. Physical layer simulations show successful buffering and forwarding of 40-Gb/s optical packets with 2-dB power penalty 相似文献
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E. Kehayas J. Seoane Y. Liu J.M. Martinez J. Herrera P.V. Holm-Nielsen S. Zhang R. McDougall G. Maxwell F. Ramos J. Marti H.J.S. Dorren P. Jeppesen H. Avramopoulos 《Photonics Technology Letters, IEEE》2006,18(16):1750-1752
In this letter, we demonstrate that all-optical network subsystems, offering intelligence in the optical layer, can be constructed by functional integration of integrated all-optical logic gates and flip-flops. In this context, we show 10-Gb/s all-optical 2-bit label address recognition by interconnecting two optical gates that perform xor operation on incoming optical labels. We also demonstrate 40-Gb/s all-optical wavelength-switching through an optically controlled wavelength converter, consisting of an integrated flip-flop prototype device driven by an integrated optical gate. The system-level advantages of these all-optical subsystems combined with their realization with compact integrated devices, suggest that they are strong candidates for future packet/label switched optical networks. 相似文献
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Yiannopoulos K. Vyrsokinos K. Tsiokos D. Kehayas E. Pleros N. Theophilopoulos G. Houbavlis T. Guekos G. Avramopoulos H. 《Quantum Electronics, IEEE Journal of》2004,40(2):157-165
We present methods for obtaining high-repetition-rate full duty-cycle RZ optical pulse trains from lower rate laser sources. These methods exploit the memory properties of the Fabry-Perot filter for rate multiplication, while amplitude equalization in the output pulse train is achieved with a semiconductor optical amplifier or with a second transit through the Fabry-Perot filter. We apply these concepts to experimentally demonstrate rate quadruplication from 10 to 40 GHz and discuss the possibility of taking advantage of the proposed methods to achieve repetition rates up to 160 GHz. 相似文献
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IST-LASAGNE: towards all-optical label swapping employing optical logic gates and optical flip-flops 总被引:2,自引:0,他引:2
Ramos F. Kehayas E. Martinez J.M. Clavero R. Marti J. Stampoulidis L. Tsiokos D. Avramopoulos H. Zhang J. Holm-Nielsen P.V. Chi N. Jeppesen P. Yan N. Monroy I.T. Koonen A.M.J. Hill M.T. Liu Y. Dorren H.J.S. Van Caenegem R. Colle D. Pickavet M. Riposati B. 《Lightwave Technology, Journal of》2005,23(10):2993-3011
The Information Society Technologies-all-optical LAbel SwApping employing optical logic Gates in NEtwork nodes (IST-LASAGNE) project aims at designing and implementing the first, modular, scalable, and truly all-optical photonic router capable of operating at 40 Gb/s. The results of the first project year are presented in this paper, with emphasis on the implementation of network node functionalities employing optical logic gates and optical flip-flops, as well as the definition of the network architecture and migration scenarios. 相似文献
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Kehayas E. Vyrsokinos K. Stampoulidis L. Christodoulopoulos K. Vlachos K. Avramopoulos H. 《Lightwave Technology, Journal of》2006,24(8):2967-2977
A 40-Gb/s asynchronous self-routing network and node architecture that exploits bit and packet level optical signal processing to perform synchronization, forwarding, and switching in the optical domain is presented. Optical packets are self-routed on a hop-by-hop basis through the network by using stacked optical tags, each representing a specific optical node. Each tag contains necessary control signals for configuring the node-switching matrix and forwarding each packet to the appropriate outgoing link and onto the next hop. In order to investigate the feasibility of their approach physical-layer simulations are performed, modeling each optical subsystem of the node showing acceptable signal quality and end-to-end bit error rates. In the All-optical self-RouTer EMploying bIt and packet-level procesSing (ARTEMIS) control plane, a timed/delayed resource reservation-based signaling scheme is employed combined with a load-balancing feedback-based contention-avoidance mechanism that can guarantee a high performance in terms of blocking probability and end-to-end delay. 相似文献
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Kehayas E. Kanellos G.T. Stampoulidis L. Tsiokos D. Pleros N. Guekos G. Avramopoulos H. 《Lightwave Technology, Journal of》2004,22(11):2548-2556
In this paper, we demonstrate optical transparency in packet formatting and network traffic offered by all-optical switching devices. Exploiting the bitwise processing capabilities of these "optical transistors," simple optical circuits are designed verifying the independency to packet length, synchronization and packet-to-packet power fluctuations. Devices with these attributes are key elements for achieving network flexibility, fine granularity and efficient bandwidth-on-demand use. To this end, a header/payload separation circuit operating with IP-like packets, a clock and data recovery circuit handling asynchronous packets and a burst-mode receiver for bursty traffic are presented. These network subsystems can find application in future high capacity data-centric photonic packet switched networks. 相似文献
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