Performance and reliability of SLS ELA polysilicon TFTs fabricated with novel crystallization techniques

SLS ELA polysilicon TFTs fabricated in films crystallized with several novel techniques, yielding different film microstructure and texture, were investigated. The parameter statistics indicate that the TFT performance depends on film quality and asperities, in conjunction with the grain boundary trap density. The drain current transients, upon TFT switch from OFF to ON state, showed gate oxide polarization, related to film asperities and also confirmed the presence of extended defects in the TFTs of small mobilities. DC hot carrier stress was applied, indicating a reliability dependence on polysilicon structure and differences in degradation mechanisms for the various TFT technologies.     

MRE hierarchical decomposition of general queueing network models

Summary The principle of Minimum Relative Entropy (MRE), given fully decomposable subset and aggregate mean queue length, utilisation and flow-balance constraints, is used in conjunction with asymptotic connections to infinite capacity queues, to derive new analytic approximations for the conditional and marginal state probabilities of single class general closed queueing network models (QNMs) in the context of a multilevel variable aggregation scheme. The concept of subparallelism is applied to preserve the flow conservation and a universal MRE hierarchical decomposition algorithm is proposed for the approximate analysis of arbitrary closed queueing networks with single server queues and general service-times. Heuristic criteria towards an optimal coupling of network's units at each level of aggregation are suggested. As an illustration, the MRE algorithm is implemented iteratively by using the Generalised Exponential (GE) distributional model to approximate the service and asymptotic flow processes in the network. This algorithm captures the exact solution of separable queueing networks, while for general queueing networks it compares favourably against exact solutions and known approximations.This work is sponsored by the Science and Engineering Research Council (SERC), UK, under grant GR/F29271     

Mathematical methods for the modular design of computer systems

An approach to modular design is proposed, involving the estimation of the information transfer between the modules of acomplex system.In apreviouspaper[l], a general decomposition criterion was derived, employing the entropy function as a measure of the amount of information contained within a system or subsystems. This paper concerns the formulation of an algorithm for the optimisation of the criterion which decomposes hierarchically a system into its most independent subsystems or modules. A simple illustrative example is given and further, the design methodology is applied to detect the modular structure of a computer teaching system.     

Performance modelling and cost-effective analysis of multiserviceintegrated networks

The performance prediction and quantitative analysis of multiservice integrated networks are extremely important in view of their ever expanding usage and the multiplicity of their component parts together with the complexity of their functioning. Queueing network models (QNMs) are widely recognised as powerful and realistic tools for representing these systems as complex networks of queues and servers and optimising their performance. This paper highlights the use of cost-effective methodologies as applied to performance modelling studies involving QNMs of asynchronous transfer mode (ATM) switch architectures with bursty and/or correlated traffic. These methodologies offer simple and practical means for performance evaluation and prediction and have their roots in the principle of maximum entropy (ME), queueing theoretic concepts and batch renewal processes for traffic characterisation. Comments on current theoretical advances and future research work are included     

Polycrystalline silicon thin film transistors fabricated at reducedthermal budgets by utilizing fluorinated gate oxidation

Polycrystalline silicon thin film transistors have been fabricated at reduced gate oxidation thermal budgets by utilizing NF₃-enhanced dry oxidation. Good performance TFTs with effective electron mobility values as high as 38 cm²/V.sec, threshold voltage values near zero, ON/OFF current ratios of up to 5×10⁷ and subthreshold slopes of 0.3 V/dec have been fabricated at an oxidation temperature of 800°C. Stable devices at an electrical stressing field of 3 MV/cm were demonstrated. Thermal gate oxide TFTs have also been fabricated at a maximum temperature of 650°C. The effect of hydrogen plasma passivation was found to depend on process conditions and was correlated with the amount of fluorine in the area near the Si-SiO₂ interface. Passivation at low power was always beneficial. Passivation at high power was highly beneficial for a limited amount of interfacial fluorine, but less beneficial or even detrimental when a large fluorine amount in the near interface area was present     

Characteristics of W and Cu/W gate MOS diodes fabricated by a process utilizing LPCVD of W and Cu lift-off

MOS diodes having double layer Cu/W, W, or Al gates were fabricated using tungsten chemical vapor deposition, copper evaporation and lift-off and were characterized before and after thermal anneals. The breakdown field statistics were determined for all kinds of devices, while the high field conduction and charge trapping in the oxide were investigated. The W gate devices exhibited high performance and very low degradation even after annealing at 650 °C. In Cu/W gate diodes good barrier action of our LPCVD tungsten films against copper penetration after annealing at 510 °C was observed, while reduced breakdown integrity and degradation due to copper diffusion occurred after annealing at 650 °C.     

Performance Related Security Modelling and Evaluation of RANETs

An exposition is undertaken on the performance related security modelling and evaluation of a robotic mobile wireless ad hoc networks (RANETs) and associated tradeoffs. It is based on the discrete event simulation analysis of a stable open gated queueing network model with infinite capacity, arbitrary configuration and multiple classes of packets under first-come-first-served and head-of-line rules. In this context, a quantitative case study on the trade-offs between performance and the wired equivalent privacy (WEP) security/selective security protocol is explored, based on generalised exponential transmission times and bursty arrival traffic flows characterised by an Interrupted Compound Poisson Process. Typical numerical experiments are carried out to evaluate the adverse effect of WEP security/selective security on performance and for illustration purposes, assess the adoption of a dual CPU towards performance enhancement of the RANET. A discussion on other vital related aspects such as broadcasting/multicasting and fault localisation in RANETs and their synergy with cognitive radio ad hoc networks (CRAHNs) is included.     

An experimental study of the thermally activated processes in polycrystalline silicon thin film transistors

The thermally activated mechanisms that determine the electrical properties of polycrystalline silicon thin film transistors have been investigated. The study employed devices fabricated on long grains and different thickness polycrystalline films, which were obtained by excimer laser annealing crystallization. The transfer and the transient characteristics have been recorded and analysed in the linear operation regime. The temperature dependence of basic parameters such as leakage current, subthreshold swing and drain current overshoot transient amplitude was found to stem from the same thermally activated carriers generation mechanism. The dependence of thermally activated mechanisms on the film thickness suggests that the device operation is strongly related to polycrystalline material properties.