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We discuss the temperature dependence of a common low temperature local thermometer, a tunnel junction between a superconductor and a normal metal (NIS junction). Towards the lowest temperatures its characteristics tend to saturate, which is usually attributed to selfheating effects. In this technical note, we reanalyze this saturation and show that the temperature independent subgap current of the junction alone explains in some cases the low temperature behavior quantitatively.
相似文献In this paper, we propose to use Artificial Bee Colony (ABC) optimization to solve the joint mode selection, channel assignment, and power allocation (JMSCPA) problem to maximize system throughput and spectral efficiency. JMSCPA is a problem where the allocation of channel and power depends on the mode selection. Such problems require two step solution and are called bi-level optimization problems. As bi-level optimization increases the complexity and computational time, we propose a modified version of single-level ABC algorithm aided with the adaptive transmission mode selection algorithm to allocate the cellular, reuse, and dedicated modes to the DUs along with channel and power allocation based on the network traffic load scenarios. A single variable, represented by the users (CUs and DUs) is used to allocate mode selection, and channel allocation to solve the JMSCPA problem, leading to a simpler solution with faster convergence, and significant reduction in the computational complexity which scales linearly with the number of users. Further, the proposed solution avoids premature stagnation of conventional ABC into local minima by incorporating a modification in its update procedure. The efficacy of the ABC-aided approach, as compared to the results reported in the literature, is validated by extensive numerical investigations under different simulation scenarios.
相似文献In this work we analysed the stepwise charging technique to find the limits from which it is beneficial in terms of load capacitance and charge–discharge frequency. We included in the analysis practical limitations such as the consumption of auxiliary logic needed to implement the technique and the minimum size of auxiliary switches imposed by the technology. We proposed an ultra-low-power logic block to push these limits and to obtain benefits from this technique in small capacitances. Finally, we proposed to use a stepwise driver in the driving of the gate capacitance of power switches in switched-capacitor (SC) DC–DC converters. We designed and manufactured, in a 130 nm process, a SC DC–DC converter and measured a 29% energy reduction in the gate-drive losses of the converter. This accounts for an improvement of 4% (from 69 to 73%) in the overall converter efficiency.
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