Influence of the ground line position on the signal integrity of product-related interconnects in the frequency and time domain

The impact of the ground line position on the line parameters of signal interconnects built in a 110-nm CMOS technology is investigated in the presence of a conductive substrate. Characteristic line parameters obtained from simulations are validated with two-port network analyzer measurements of specially designed test structures in a frequency range up to 50 GHz. In addition, the influence of the ground line position on time-domain signals in product-related bus systems is explored. It is shown that the impact of substrate effects on the line parameters, and consequently on the signal shape in the time domain, strongly depends on the relative position of the ground line with respect to the signal lines and, as expected, on the length of the line system. The authors show that for short on-chip bus systems (shorter than 2 mm), the influence of the ground line positioning on time-domain signals is negligible. However, for long bus systems (e.g., 5 mm), this influence becomes significant and can no longer be neglected.     

Broadband modeling and measurement of the signal behavior in S/390MCM packages

In this work, we investigate the electrical performance of critical signal paths in IBM's S/390 MCM packages. We present lumped RLC-models suitable for standard circuit simulators like e.g. SPICE. The models are developed from finite element simulations of typical signal path segments. By comparing S-parameters from simulations of the models to two-port network analyzer measurements we validate the models in a frequency range up to 3 GHz