A study of residual stress distribution through the thickness of p+ silicon films [thermal oxidation effects]

The effect of thermal oxidation on the residual stress distribution throughout the thickness of heavily-boron-doped (p⁺ ) silicon films is studied. The deflection of p⁺ silicon cantilever beams due to residual stress variation throughout the film thickness is studied for as-diffused and thermally oxidized films. Cantilevers of as-diffused p⁺ silicon films display a positive curvature (or a negative bending moment), signified by bending up of the beams. Thermal oxidation of the films prior to cantilever fabrication by anisotropic etching modifies the residual stresses in the p⁺ film, specially in the near-surface region (i.e. the top 0.3 to 0.5 μm for the oxidation times used here), and can result in beams with a negative curvature even when the oxide is removed from the p⁺ silicon cantilever surface subsequent to cantilever fabrication     

Diffraction grating scanners using polysilicon micromotors

This paper describes polysilicon micromotors with single and pyramidal diffraction grating elements fabricated on the polished surface of large-area rotors for optical scanning applications. While taking full advantage of planar processing, such scanners have high-quality scan profiles, good efficiency, meter working distances, and multiple out of plane beam diffraction orders. Chemical-mechanical polishing was used to reduce the 5-μm-thick polysilicon rotors' average surface roughness from 420 Å to below 17 Å, with less than 1500-Å film removal, improving the optical performance of the gratings as well as the definition, delineation, and side wall quality of the device features. Self-assembled monolayers (SAM) were found to improve the overall micromotor's dynamic performance. SAM-coated scanners could operate at voltages as low as 15 V and maximum operational speeds of 5200 rpm. The gratings were tested optically at 633-nm wavelength and were verified to have spatial periods of 1.80 and 3.86 μm, closely matching their design values. Stepping and continuous mode dynamic operation of the scanners was demonstrated with visible diffraction orders at meter distances away     

Fabrication of low defect density 3C-SiC on SiO2 structures using wafer bonding techniques

This paper reports on a process to fabricate single-crystal 3C-SiC on SiO₂ structures using a wafer bonding technique. The process uses the bonding of two polished polysilicon surfaces as a means to transfer a heteroepitaxial 3C-SiC film grown on a Si wafer to a thermally oxidized Si wafer. Transfer yields of up to 80% for 4 inch diameter 3C-SiC films have been achieved. Homoepitaxial 3C-SiC films grown on the 3C-SiC on SiO₂ structures have a much lower defect density than conventional 3C-SiC on Si films.     

Very thin poly-SiC films for micro/nano devices

We report characterization of nitrogen-doped, very thin, low-stress polycrystalline silicon carbide (poly-SiC) films suitable for fabricating micro/nano devices. The poly-SiC films are deposited on 100 mm-diameter (100) silicon wafers in a large-scale, hot-wall, horizontal LPCVD furnace using SiH2Cl2 and C2H2 as precursors and NH, as doping gas. The deposition temperature and pressure are fixed at 900 degrees C and 4 Torr, respectively. The deposition rate increases substantially in the first 50 minutes, transitioning to a limiting value thereafter. The deposited films exhibit (111)-orientated polycrystalline 3C-SiC texture. HR-TEM indicates a 1 nm to 4 nm amorphous SiC layer at the SiC/silicon interface. The residual stress and the resistivity of the films are found to be thickness dependent in the range of 100 nm to 1 microm. Films with thickness less than 100 nm suffer from voids or pinholes. Films thicker than 100 nm are shown to be suitable for fabricating micro/nano devices.     

Fabrication and testing of surface micromachined polycrystallineSiC micromotors

The authors present the fabrication and testing of surface micromachined polycrystalline silicon carbide micromotors. A new multilayer fabrication process utilizing low temperature deposition and micromolding techniques was developed to create the desired SiC structural components. Typical operating voltages of salient-pole and wobble micromotors in room air were 100 and 80 V, respectively. Wobble micromotors were tested at room temperature in atmospheres of argon, nitrogen, oxygen, and room air (25% humidity). The gear ratio as a function of applied voltage was higher for operation in room air as compared with the other gases, suggesting a relationship between gear ratio and relative humidity. In addition, micromotors were tested at elevated temperatures and exhibited stable operation up to 500°C     

Internal stress and elastic modulus measurements on micromachined3C-SiC thin films

Fabrication of epitaxial 3C-SiC microstructures by bulk micromachining of the underlying silicon substrate was investigated. Initial studies of the mechanical properties of epitaxial 3C-SiC films deposited on silicon were carried out on microstructures fabricated by bulk micromachining of the silicon substrate to evaluate the potential of these films for micromechanics. Residual stress and biaxial modulus of 3C-SiC films were measured by load-deflection measurements of suspended diaphragms. The film's residual stress was tensile with an average of 212 MPa, while the in-plane biaxial modulus averaged 441 GPa     

Fabrication and testing of bulk micromachined silicon carbide piezoresistive pressure sensors for high temperature applications

This paper explores the development of high-temperature pressure sensors based on polycrystalline and single-crystalline 3C-SiC piezoresistors and fabricated by bulk micromachining the underlying 100-mm diameter (100) silicon substrate. In one embodiment, phosphorus-doped APCVD polycrystalline 3C-SiC (poly-SiC) was used for the piezoresistors and sensor diaphragm, with LPCVD silicon nitride employed to electrically isolate the piezoresistor from the diaphragm. These piezoresistors fabricated from poly-SiC films deposited at different temperatures and doping levels were characterized, showing -2.1 as the best gauge factor and exhibited a sensitivities up to 20.9-mV/V*psi at room temperature. In a second embodiment, epitaxially-grown unintentionally nitrogen-doped single-crystalline 3C-SiC piezoresistors were fabricated on silicon diaphragms, with thermally grown silicon dioxide employed for the piezoresistor electrical isolation from the diaphragm. The associated 3C-SiC/SiO/sub 2//Si substrate was fabricated by bonding a (100) silicon wafer carrying the 3C-SiC onto a silicon wafer with thermal oxide covering its surface. The 3C-SiC handle wafer was then etched away in KOH. The diaphragm was fabricated by time etching the silicon substrate. The sensors were tested at temperatures up to 400/spl deg/C and exhibited a sensitivity of 177.6-mV/V*psi at room temperature and 63.1-mV/V*psi at 400/spl deg/C. The estimated longitudinal gauge factor of 3C-SiC piezoresistors along the [100] direction was estimated at about -18 at room temperature and -7 at 400/spl deg/C.     

Pendeo-epitaxial growth of gallium nitride on silicon substrates

Pendeo-epitaxy (PE)¹ from raised, [0001] oriented GaN stripes covered with silicon nitride masks has been employed for the growth of coalesced films of GaN(0001) with markedly reduced densities of line and planar defects on Si(111)-based substrates. Each substrate contained previously deposited 3C-SiC(111) and AlN(0001) transition layers and a GaN seed layer from which the stripes were etched. The 3C-SiC transition layer eliminated chemical reactions between the Si and the NH₃ and the Ga metal from the decomposition of triethylgallium. The 3C-SiC and the GaN seed layers, each 0.5 μm thick, were also used to minimize the cracking and warping of the GaN/SiC/silicon assembly caused primarily by the stresses generated on cooling due to the mismatches in the coefficients of thermal expansion. Tilting in the coalesced GaN epilayers of 0.2° was confined to areas of lateral overgrowth over the masks; no tilting was observed in the material suspended above the trenches. The strong, low-temperature PL band-edge peak at 3.456 eV with a FWHM of 17 meV was comparable to that observed in PE GaN films grown on AlN/6H-SiC(0001) substrates.     

Contact physics of gold microcontacts for MEMS switches

This work presents a study of gold metallic contacts regarding contact resistance, heat dissipation, and surface damage in the normal-force regime of tens to hundreds of μN, which is typical of the contact forces from microactuation. The purpose of this work is to present the micromechanical switch designer with practical information on gold contact phenomena in this force regime, as most work in micrometallic contacts has focused on contact forces greater than 1 mN. Results indicate actuation forces of several hundred μN are required for reliable fully metallic contacts, with resistance and current carrying ability primarily dependent on morphology, thermal management, and nm-depth material properties of the contact electrodes     

Thick glass film technology for polysilicon surface micromachining

This paper explores the use of thick glass films as suitable alternatives to CVD oxide films for use as sacrificial, planarization, and passivation layers in polysilicon surface micro-machining processes. Such glasses can be spin-coated to produce films up to 20 μm thick in one step and to globally planarize the wafer surface, extending the overall mechanical design capability by enabling additional device structural complexity. Glass optical constants were determined, and the film quality was evaluated using SEM, EDS, XPS, and XRD. The films were found to have low intrinsic stresses and other characteristics desirable for sacrificial layer applications. A glass chemical-mechanical polishing process with 5300~Å/min removal rate and acceptable selectivity to polysilicon was developed, along with a wet etch chemistry that preferentially etches the film at 3.24 μm/min without affecting the silicon substrate or the structural polysilicon. The film was used to planarize up to 10-μm-tall topographies associated with surface micromachined features through spin-on and polish-back steps, and was in addition demonstrated to be a viable protective layer for silicon wafers during extended KOH etching in silicon bulk micro-machining processes. The glass has stable constituents that do not diffuse or contaminate either the substrate or the device features during the application and firing procedures