Implementation of the time delay and integration mode in a scanning 576 × 6 focal-plane array of the long-wave infrared range

The results of the development of a focal-plane array (FPA) of the 576 × 6 format with the time delay and integration (TDI) mode are presented. The comparative analysis of different variants of implementation of the TDI mode in ROIC is conducted. The expedience of the upgrade of existing scanning photodetectors of the 288 × 4 format on the basis of the developed 576 × 6 FPA is justified. The result of this upgrade will be simplification of the optical–mechanical scanning unit and improvement of the quality of thermal image.     

Implementation of the TDA Digital Mode on a ROIC for Scanning IR FPA

Journal of Communications Technology and Electronics - In this paper, we present the results of the development of a readout integrated circuit for scanning infrared focal plane arrays with digital...     

Focal Plane Array Based on the InGaAs/InP Heterostructure for 3D Imaging in Short-Wave IR Range

Journal of Communications Technology and Electronics - A Russian-made focal plane array (FPA) for gated imager working in the short-wave IR range is presented. The FPA contains an array of...     

Extension of the Dynamic Range of Short-Wavelength IR FPAs

Journal of Communications Technology and Electronics - Necessity of extension of the dynamic range of short-wavelength IR FPAs is substantiated. Conventional methods exhibit low efficiency,...     

Comparative analysis of readout large-scale integrated circuits with an analog-to-digital converter in the cell for a photodetector of the far infrared range

The design of a 14-bit delta-sigma analog-to-digital converter (ADC) with pipelined readout is considered. Basic concepts of the design of array photodetectors of the infrared (IR) range with an ADC in the accumulating cell are analyzed. The presence of an ADC in the readout large-scale integrated circuit (LSIC) cell provides an opportunity to increase the accumulation time by more than an order of magnitude and improve the threshold characteristics. A method for optimization of the ADC area by using an LFSR counter operating in two modes (digital code generation and serial readout) is proposed.