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Cooperative diversity is a transmission technique, where multiple terminals share their resources to form a virtual antenna array that realizes spatial diversity gain in a distributed fashion. In this paper, we focus on a performance evaluation for orthogonal frequency division multiplexing (OFDM) transmission in cooperative networks under partial-band jamming (PBJ) environments. We present a bit error rate (BER) analysis for a cooperative diversity system with amplifying-and-forward (AF) relays over partially jammed Rayleigh fading channels. In addition, a simple jamming mitigation technique, called relay-based sub-band shifting method, is proposed. Through this approach, each sub-band of the amplified OFDM symbol at the relay can be changed by the predefined shifting rule of each relay, and the jamming effects at the destination are partially removed. Simulation results show that the proposed method improves significantly the BER performance at a low signal-to-jamming ratio.  相似文献   
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In the paper, we deal with a single-selection opportunistic relaying with the decode-and-forward (DF) protocol over Rayleigh fading channels. The exact end-to-end average signalto- noise ratios (SNR) and ergodic capacities of both proactive and reactive opportunistic relaying are derived as a closed-form for arbitrary link SNR. In addition, the effective ergodic capacity satisfying the minimum required data rate without outage is also identified for both relaying schemes. The analysis results are used to demonstrate which relaying scheme outperforms the other for given system parameters.  相似文献   
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Abstract— A new technology, advanced dynamic capacitance compensation (A‐DCC), for improved dynamic performance of LCD monitors, is presented. Conventional LCD monitors suffer from certain specific artifacts, such as wire‐frame flicker and line dimming, which are not issues for the simpler motion images found in television content. A‐DCC addresses these more‐challenging monitor cases by means of an advanced architecture which analyzes multi‐frame data and applies more comprehensive lookup‐table corrections according to the specific frame sequence.  相似文献   
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Recent advances in physics-based sound synthesis have unveiled numerous possibilities for the creation of new musical instruments. Despite the fact that research on physics-based sound synthesis has been going on for three decades, its higher computational complexity compared to that of signal modeling has limited its use in real-time applications. This limitation has motivated research on parallel processing architectures that support the physics-based sound synthesis of musical instruments. In this paper, we present analytical results of the design space exploration of many-core processors for the physics-based sound synthesis of plucked-string instruments including acoustic guitar, classical guitar and the gayageum, which is representative of a Korean plucked-string instrument. We do so by quantitatively evaluating the significance of a sample-per-processing-element (SPE) ratio–i.e., the amount of sample data directly mapped to each processing element, which is equivalent to varying the number of processing elements for a fixed sample size on system performance and efficiency using architectural and workload simulations. The effect of the sample-to-processor ratio is difficult to analyze because it fundamentally affects both hardware and software design when varied. In addition, the optimal SPE ratio is not typically at either extreme of its range–i.e., one sample per processor or one processor per an entire sample. This paper illustrates the correlation between a fixed problem sample size, SPE ratio and processing element (PE) architecture for a target implementation in 130-nm CMOS technology. Experimental results indicate that an SPE in the range of 5513 to 2756, which is equivalent to 48 to 96 PEs for guitars and 96 to 192 PEs for the gayageum, provides the most efficient operation for the synthesis of musical sounds sampled at 44.1 kHz, yielding the highest task throughput per unit area or per unit energy. In addition, the produced synthesized sounds appear to be very similar to the original sounds, and the selected optimal many-core configurations outperform commercial processor architectures including DSPs, FPGAs, and GPUs in terms of area efficiency and energy efficiency.  相似文献   
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This paper presents a Graphics Processing Unit (GPU)-based implementation of a Bellman-Ford (BF) routing algorithm using NVIDIA’s Compute Unified Device Architecture (CUDA). In the proposed GPU-based approach, multiple threads run concurrently over numerous streaming processors in the GPU to dynamically update routing information. Instead of computing the individual vertex distances one-by-one, a number of threads concurrently update a larger number of vertex distances, and an individual vertex distance is represented in a single thread. This paper compares the performance of the GPU-based approach to an equivalent CPU implementation while varying the number of vertices. Experimental results show that the proposed GPU-based approach outperforms the equivalent sequential CPU implementation in terms of execution time by exploiting the massive parallelism inherent in the BF routing algorithm. In addition, the reduction in energy consumption (about 99 %) achieved by using the GPU is reflective of the overall merits of deploying GPUs across the entire landscape of IP routing for emerging multimedia communications.  相似文献   
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