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1.
An integrated digital controller for dc-dc switch-mode power supplies (SMPS) used in portable applications is introduced. The controller has very low power consumption, fast dynamic response, and can operate at programmable constant switching frequencies exceeding 10 MHz. To achieve these characteristics, three novel functional blocks, a digital pulse-width modulator based on second-order sigma-delta concept (Sigma-Delta DPWM), dual-clocking mode compensator, and nonlinear analog-to-digital converter are combined. In steady state, to minimize power consumption, the controller is clocked at a frequency lower than SMPS switching frequency. During transients the clock rate is increased to the switching frequency improving transient response. The controller integrated circuit (IC) is fabricated in a standard 0.18-mum process and tested with a 750-mW buck converter prototype. Experimental results show the controller current consumption of 55 muA/MHz and verify closed-loop operation at programmable switching frequencies up to 12.3 MHz. Simulation results indicating that this architecture can potentially support operation at switching frequencies beyond 100 MHz are also presented.  相似文献   
2.
This paper introduces a new method for stability analysis and design of fast voltage-loop compensators in rectifiers with power factor correction (PFC). The method has few constraints and can be used with various implementations of the fast voltage loop. It is based on utilization of circle criterion, which unifies frequency domain and nonlinear system analysis. A step-by-step procedure of stability assessment and compensator design is described and demonstrated on two controller implementations. In the first system, the voltage-loop dynamic response of an experimental 200-W digitally-controlled boost-based PFC is improved with a self-tuning comb filter. In the second implementation, it is shown how the circle criterion can be used to design a fast voltage loop for controllers with regulation band, i.e., ldquodead-zone,rdquo element for ripple elimination.  相似文献   
3.
An approach for online current sensing calibration is presented where an auxiliary switch and a precision sense resistor are connected in parallel with a main power switch to achieve accuracy comparable to the sense resistor method, together with the advantage of essentially no additional power loss. The proposed current-sensing circuit and the calibration methods are particularly well suited for digital controller implementations where the required control and calibration functions can be easily accomplished. Experimental results with a digitally controlled 1.5-V 15-A synchronous buck converter demonstrate functionality of the online calibration approach, showing a significant improvement in accuracy over voltage sensing across the power MOSFET on-resistance.  相似文献   
4.
This paper introduces a simple digital control method that enables fast regulation of the output voltage in low harmonic rectifiers with power factor correction (PFC). The method is based on the use of an insensitive region, i.e., "dead-zone," in analog-to-digital conversion, for elimination of the output capacitor voltage ripple in the feedback loop. The dead-zone can either be fixed and larger than the maximum ripple magnitude, or it can be dynamically adjusted in accordance with the output load. Simple implementations of these two dead-zone controllers are shown on an experimental completely digitally controlled 250-W boost PFC operating at 200-kHz switching frequency. The experimental results show that this control method results in low current harmonics and improved load transient responses, which are significantly faster than in low-harmonic rectifiers with conventional low-bandwidth voltage-loop controllers.  相似文献   
5.
This paper introduces a voltage mode digital controller for low-power high-frequency DC-DC switch-mode power supplies (SMPS) that has fast transient response, approaching physical limitations of a given power stage. In steady state, the controller operates as a conventional pulsewidth modulation regulator and during transients it utilizes a novel fast voltage recovery mechanism, based on real-time processing of the output voltage in digital domain. This continuous-time digital signal processing mechanism is implemented with a very simple processor consisting of a set of asynchronous comparators, delay cells, and combinatorial logic. To eliminate the need for current measurement and calculate the optimal switching sequence of the power stage transistors, the processor performs a capacitor charge balance algorithm, which is based on the detection of the output voltage peak/valley point. The effectiveness of the controller is demonstrated on an experimental 5 W, 5 V to 1.8 V, 400 kHz buck converter. The converter recovers from load transients through a single on-off action of the power switch, virtually reaching the shortest possible time, limited by the values of the power stage filter components only.  相似文献   
6.
Non-covalent interactions between β-lactoglobulin (BLG) and polyphenol extracts of teas, coffee and cocoa were studied by fluorescence and CD spectroscopy at pH values of the gastrointestinal tract (GIT). The biological implications of non-covalent binding of polyphenols to BLG were investigated by in vitro pepsin and pancreatin digestibility assay and ABTS radical scavenging activity of complexes formed. The polyphenol–BLG systems were stable at pH values of the GIT. The most profound effect of pH on binding affinity was observed for polyphenol extracts rich in phenolic acids. Stronger non-covalent interactions delayed pepsin and pancreatin digestion of BLG and induced β-sheet to α-helix transition at neutral pH. All polyphenols tested protected protein secondary structure at an extremely acidic pH of 1.2. A positive correlation was found between the strength of protein–polyphenol interactions and (a) half time of protein decay in gastric conditions (R2 = 0.85), (b) masking of total antioxidant capacity of protein–polyphenol complexes (R2 = 0.95).  相似文献   
7.
In digitally controlled dc-dc converters with a single voltage feedback loop, the two quantizers, namely the analog-to-digital (A/D) converter and the digital pulse-width modulator (DPWM), can cause undesirable limit-cycle oscillations. In this paper, static and dynamic models that include the quantization effects are derived and used to explain the origins of limit-cycle oscillations. In the static model, existence of dc solution, which is a necessary no-limit-cycle condition, is examined using a graphical method. Based on the generalized describing function method, the amplitude and offset-dependent gain model of a quantizer is applied to derive the dynamic system model. From the static and dynamic models, no-limit-cycle conditions associated with A/D, DPWM and compensator design criteria are derived. The conclusions are illustrated by simulation and experimental examples  相似文献   
8.
This paper introduces a new method and system for parameter extraction and automated controller adjustment, suitable for low power digitally controlled DC-DC switch-mode power supplies (SMPS). The system allows closed-loop calibration throughout regular converter operation. During a short-lasting test phase, SMPS parameters, such as output capacitance and load, are estimated by examining the amplitude and frequency of intentionally introduced limit cycle oscillations in duty ratio control variable as well as from its steady state value. Accordingly, a digital compensator is automatically constructed to provide fast dynamic response and good output voltage regulation. In addition, the load estimation data are used for improving efficiency of a converter having segmented transistors. It is performed through a selection of driving sequence resulting in minimized sum of switching and conduction losses. The effectiveness of the system is demonstrated on an experimental 400 kHz, 9 V-to-3.3 V, 10 W, digitally controlled synchronous buck converter.  相似文献   
9.
The in vitro gastric digestion of several food allergens (beta-lactoglobulin (BLG), alpha-lactalbumin (LA) and peanut allergens (PE)) in the presence of a catechin-enriched polyphenol extract of green tea (GTC), oxidized polyphenols and phenol oxidase processed food allergens and GTC was investigated. Pepsin-resistant proteins, such as BLG, major peanut allergens, Ara h 1 and Ara h 2, degrade faster in the presence of catechin-enriched green tea polyphenols. Phenol oxidase polymerized GTC affected adversely protein digestion of BLG and LA, but not digestion of PE proteins. Protecting effect of polyphenols correlated well with the ability of proteins to form insoluble complexes with oxidized catechins. Cross-linking of proteins and polyphenols further extended the half-lives of BLG and LA in the in vitro digestion by pepsin. Catechin-enriched green tea polyphenols of food supplements facilitate pepsin digestion of major food allergens, but hamper their digestion if oxidized and polymerized by phenol oxidase.  相似文献   
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