Simplified 0.35-μm flash EEPROM process using high-temperatureoxide (HTO) deposited by LPCVD as interpoly dielectrics and peripheraltransistors gate oxide

A simplified flash EEPROM process was developed using high-temperature LPCVD oxide both as flash cells interpoly dielectrics and as peripheral transistors gate oxide (decoding logic). An O₂ anneal at 850°C lowers charge trapping and interface trap density induced by Fowler-Nordheim injection. However, electron trapping remains slightly higher than with dry thermal oxide. Similar memory charge loss and write-erase endurance are obtained as for ONO-insulated cells. HTO thus proves to have the required quality and reliability to be used in flash EEPROMs     

Plasma charging damage mechanisms and impact on new technologies

Plasma charging damage is a serious concern in fab today. In this topic will be discussed mechanisms through which charging damage arises, how to characterize them, and how to minimize them at the different phases of circuit fabrication. The relation between oxide thickness and damage will be discussed highlighting the importance of characterization methods and reliability physics. Importance of charging damage on new technologies as copper and SOI will be discussed.     

Modeling of program, erase and retention characteristics of charge-trap gate all around memories

This paper describes the effect of geometry in charge-trap (CT) memory devices. We first theoretically analyze the impact of the curvature radius on the behavior of the gate current in Gate-All-Around devices, and then describe the change to make to planar model in order to fit the cylindrical devices characteristics. This model is used to simulate Nanocrystal and SONOS program, erase and retention behaviors. The dynamics enhancement during program/erase due to the bending of the active region in such cylindrical devices is explained. The scaling perspectives conclude this paper.     

Carrier transport in HfO/sub 2//metal gate MOSFETs: physical insight into critical parameters

Electron and hole mobility in HfO/sub 2//metal gate MOSFETs is deeply studied through low-temperature measurements down to 4.2 K. Original technological splits allow the decorrelation of the different scattering mechanisms. It is found that even when charge trapping is negligible, strong remote coulomb scattering (RCS) due to fixed charges or dipoles causes most of the mobility degradation. The effective charges are found to be located in the HfO/sub 2/ near the SiO/sub 2/ interface within 2 nm. Experimental results are well reproduced by RCS calculation using 7/spl times/10/sup 13/ cm/sup -2/ fixed charges at the HfO/sub 2//SiO/sub 2/ interface. We also discuss the role of remote phonon scattering in such gate stacks. Interactions with surface soft-optical phonon of HfO/sub 2/ are clearly evidenced for a metal gate but remain of second order. All these remote interactions are significant for an interfacial oxide thickness up to 2 nm, over which, these are negligible. Finally, the metal gate (TiN) itself induces a modified surface-roughness term that impacts the low to high effective field mobility even for the SiO/sub 2/ gate dielectric references.     

Is fluorescence polarization reliable and cost efficient in a fetal lung maturity cascade?

OBJECTIVE: The objective of the study was to compare the accuracy of the TDxFLM test (Abbott Laboratories) with the fetal lung maturity cascade (shake, foam stability index, lecithin/sphingomyelin tests) and to determine whether the TDxFLM test could increase the efficiency and reduce the cost without decreasing the reliability of a cascade. STUDY DESIGN: A prospective, single-blinded study was conducted. Uncontaminated amniotic fluid obtained by transabdominal amniocentesis for fetal lung maturity assessment was evaluated with use of the fetal lung maturity cascade and the TDxFLM test. At study completion the results of the TDxFLM test were compared with those of the maturity cascade with regard to hyaline membrane disease, which was defined by strict clinical and radiographic parameters. A power analysis was performed requiring a sample size of 100 infants delivered within 72 hours of amniocentesis with use of the 95% confidence interval. RESULTS: A total of 115 cases had a full maturity cascade performed, of which 40 (35%) had a positive shake or foam stability index and 75 cases required progression to a lecithin/sphingomyelin ratio because of negative results. The TDxFLM test result was > or = 70 mg/gm in 42 (37%) of these 115. One hundred eight newborns were delivered within 72 hours of the amniocentesis; 65% (71) of these were between 30 and 37 weeks of estimated gestational age. There were 7 cases of hyaline membrane disease in the 108 newborns. Of these 108, 87 had a mature original cascade versus 85 mature tests with use of a proposed TDxFLM test-lecithin/sphingomyelin ratio cascade with one case of respiratory distress syndrome and hyaline membrane disease. The sensitivity, specificity, and positive and negative predictive values for the original cascade were 86%, 84%, 27%, and 99%, respectively; for the proposed TDxFLM test-lecithin/sphingomyelin ratio cascade the values were 86%, 83%, 26%, and 99%, respectively. The TDxFLM test-lecithin/sphingomyelin ratio cascade would have resulted in a cost reduction of 24% with no significant delay in turnaround time. CONCLUSION: The TDxFLM test appears to be a reliable and accurate assessment of fetal lung maturity. Furthermore, by replacing the shake and foam stability index portion of the cascade with the TDxFLM test, a cost savings of 24% would occur without a decrease in safety. These results also reveal that it could enhance patient care and be cost efficient for institutions not currently doing fetal pulmonary maturity testing to undertake use of the TDxFLM test and to only send out specimens for a lecithin/sphingomyelin ratio that have an initial immature TDxFLM test result (< 70 mg/gm). Likewise, institutions currently only performing a lecithin/sphingomyelin ratio may consider a TDxFLM test-lecithin sphingomyelin ratio cascade. Although direct costs would increase, they would be counterbalanced by a significant reduction in laboratory technician time.     

Performance and reliability of advanced High-K/Metal gate stacks (Invited Paper)

This paper provides a systematic study of mobility performance and Bias Temperature Instabilities (BTI) reliability in advanced dielectrics stacks. By studying a large variety of dielectric stacks we clearly demonstrate that mobility performance, interface defects Nit and Negative BTI reliability are strongly correlated. All are affected by nitrogen species N which is clearly identified as the main mobility killer when it reaches unintentionally the Si interface during the deposition of nitrided gates or the nitridation steps.     

Initial and PBTI-induced traps and charges in Hf-based oxides/TiN stacks

Positive voltage instabilities are studied for Nmos transistors with hafnium-based high-κ gate stacks. Using an optimized dedicated fast measurement setup, dynamic transient measurements of drain current are performed over more than ten decades of time. The two main phenomena involved, a reversible one known as hysteresis and a nonreversible one known as PBTI are clearly experimentally separated and studied in detail. A physical model is presented, explaining the dynamic behaviour and leading to precise traps physical characteristics and profiles inside the HfO₂ layer. PBTI defects in HfO₂ are shown to be of a different nature than hysteresis traps. A turn-around effect is evidenced for PBTI above which physical mechanisms seem to change; it has important implications on lifetime determination methodology. Finally, HfSiON experiments are presented for both hysteresis and PBTI and they show that this material is much less critical than HfO₂.     

Transport process in thin SiO2 films with an embedded 2-D array of Si nanocrystals

This work deals with the electrical characteristics and physical properties of novel dielectric systems based on silicon nanocrystals embedded in SiO₂ matrices. In particular, the transport phenomena of 10 nm thick SiO₂ capacitors with an embedded thin layer (5 nm) of LPCVD Si nanocrystals, located at different tunneling distances from the oxide–substrate interface, are studied. An original model based on an elastic tunneling phenomenon, which allows an efficient evaluation of the main structural characteristics of Si dots, is proposed.     

Accurate analysis of parasitic current overshoot during forming operation in RRAMs

In this paper, a peculiar attention is turned towards the understanding of the current overshoot occurring during the forming operation in resistive switching memory devices. This phenomenon is attributed to the discharge of a parasitic capacitance in parallel to the resistive device in simple 1R (one resistor, no transistor/diode selector) architectures. The impact of such an overshoot is analyzed on both NiO and HfO₂-based memory elements by performing measurements with different setups (quasi-static and pulse measurements). We show that the parasitic event is more severe as the forming voltage in the memory device increases. Moreover, it is shown that the post-forming resistance cannot be simply adjusted by a current compliance available on semiconductor parameter analyzers, since this internal limiter is ineffective in the microsecond range for compliance levels lower than the current spike. The current overshoot playing a detrimental role on the electrical performances of resistive devices, it must be carefully monitored when assessing the electrical performances in simple 1R architectures.     

Defects Study in Hg x Cd1−x Te Infrared Photodetectors by Deep Level Transient Spectroscopy

At high temperature, infra-red focal plane arrays are limited by their performance in operability, detectivity D ^* or noise equivalent temperature difference. Trap characterization and defect studies are necessary to better understand these limitations at high temperature. In this paper, we use deep level transient spectroscopy to study electrically active defects in mercury cadmium telluride n ⁺/p diodes. The material investigated has a cut-off frequency (λ _c) of 2.5 μm at 180 K and p doping performed with mercury vacancy. Trap energy signatures as well as capture cross-section measurements are detailed. A low temperature hole trap close to midgap is observed in the range 150–200 K with an activation energy around 0.18 ± 0.025 eV. A high temperature hole trap is also observed in the range 240–300 K with an activation energy of 0.68 ± 0.06 eV. A hole capture cross-section of 10^?19 cm² is obtained for both traps. The nature of the defects and their correlation with dark current are discussed.