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A limit cycle is the stability boundary for linear and non-linear control systems. Hamiltonian mechanics and power flow control are employed to demonstrate this property of limit cycles. The presentation begins with the concept of linear limit cycles which is extended to non-linear limit cycles. Many examples are used to demonstrate these concepts including linear and non-linear oscillators, power engineering, and an extension to a class of plane differential systems. Power flow control based on Hamiltonian mechanics is shown to be applicable to a large class of non-linear systems. Finally, eigenanalysis and flight stability for linear systems are extended to non-linear systems and is referred to as ‘the power flow principle of stability for non-linear systems’.  相似文献   
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Ultradense memory and logic circuits fabricated at local densities exceeding 100 × 10(9) cross-points per cm(2) have recently been demonstrated with nanowire crossbar arrays. Practical implementation of such nanocrossbar circuitry, however, requires effective demultiplexing to solve the problem of electrically addressing individual nanowires within an array. Importantly, such a demultiplexer (demux) must also be tolerant of the potentially high defect rates inherent to nanoscale circuit fabrication. We have built a 50?nm half-pitch nanocrossbar circuit using imprint lithography and configured it for a demux application. Utilizing a class of Hamming codes in the hardware design, we experimentally demonstrate defect-tolerant demux operations on a 12 × 8 nanocrossbar array with up to two stuck-open defects per addressed line.  相似文献   
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The voltage margin of a resistor-logic demultiplexer can be improved significantly by basing its connection pattern on a constant-weight code. Each distinct code determines a unique demultiplexer, and therefore a large family of circuits is defined. We consider using these demultiplexers for building nanoscale crossbar memories, and determine the voltage margin of the memory system based on a particular code. We determine a purely code-theoretic criterion for selecting codes that will yield memories with large voltage margins, which is to minimize the ratio of the maximum to the minimum Hamming distance between distinct codewords. For the specific example of a 64 × 64 crossbar, we discuss what codes provide optimal performance for a memory.  相似文献   
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