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1.
We present a phenomenological model allowing the study of ions drift in MIS sandwiches under bias. The density of ions in the oxide layer and their mobility, the density of ionised surface states at the oxide-semiconductor interface, and the work function difference φMS between metal and semiconductor can then be deduced from capacitance vs. voltage measurements performed in a suitable manner.

Zusammenfassung

Es wird ein phänomenologisches Modell dargestellt, das die Ionendrift in MIS-Strukturen unter elektrischer Spannung beschreibt. Die Ionendichte in der Oxidschicht und die Beweglichkeit dieser Ionen, die Dichte der ionisierten Oberflächenzustände an der Grenzfläche zwischen Oxyd und Halbleiter, sowie die Austrittsarbeit zwischen Metall und Halbleiter können aus Kapazitätsmessungen in Abhängigkeit von der Vorspannung in einfacher Weise abgeleitet werden.  相似文献   

2.
Securing Scan Control in Crypto Chips   总被引:1,自引:1,他引:0  
The design of secure ICs requires fulfilling means conforming to many design rules in order to protect access to secret data. On the other hand, designers of secure chips cannot neglect the testability of their chip since high quality production testing is primordial to a good level of security. However, security requirements may be in conflict with test needs and testability improvement techniques that increase both observability and controllability. In this paper, we propose to merge security and testability requirements in a control-oriented design for security scan technique. The proposed security scan design methodology induces an adaptation of two main aspects of testability technique design: protection at protocol level and at scan path level. Without loss of generality, the proposed solution is evaluated on a simple crypto chip in terms of security and design cost.
Bruno Rouzeyre (Corresponding author)Email:
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In this paper, we present a fast and efficient algorithm for BISTing datapaths described at the Register Transfer (RT) level. This algorithm is parameterized by user defined tuning factors allowing tradeoffs between fault coverage, area overhead and test application time. This algorithm is generic in the sense it handle and mixes heterogeneous test pattern generators and compactors.  相似文献   
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The amplification coefficients of Bleustein surface waves have been measured on photoconducting CdS at 18 MHz and 55 MHz. The influence of light wavelength and light intensity has been investigated experimentally. The results are explained in terms of the penetration depths of the mechanical wave of the drifting electric field and of the carrier distribution.  相似文献   
7.
A noise generator was used as a noncoherent source to image with the acoustic microscope. Depending on the bandwidth of the transducers it was possible to reduce the interference patterns and artefacts due to multiple transits of the acoustic waves, especially when focusing inside thick samples.  相似文献   
8.
This paper presents a new recovery scheme for dealing with short-to-long duration transient faults in combinational logic. The new scheme takes earlier into account results of concurrent error detection (CED) mechanisms, and then it is able to perform shorter recovery latencies than existing similar strategy. The proposed scheme also requires less memory resources to save input contexts of combinational logic blocks. In addition, this work also proposes a taxonomy of CED techniques. It allows pointing out which are the necessary recovery resources as well as identifying which are the types of CED mechanisms that can be used with the new recovery scheme of this paper. The effectiveness of the proposed scheme was evaluated through electrical-level simulations. For all short-to-long duration transient-fault injections, it was never slower than state-of-art similar strategy, and indeed its recovery latency was faster for 34 % of the simulated faulty scenarios.  相似文献   
9.
The attenuation properties of Rayleigh waves propagating in the x direction of y cut quartz have been measured with various metal films in the 30?157 MHz frequency range. The strong increase in the attenuation with film thickness is explained in terms of mechanical coupling and energy losses in the amorphous-metal films.  相似文献   
10.
The standard IEEE 1149.1 (Test Access Port and Boundary-Scan Architecture, also known as JTAG port) provides a useful interface for embedded systems development, debug, and test. In an 1149.1-compatible integrated circuit, the JTAG port allows the circuit to be easily accessed from the external world, and even to control and observe the internal scan chains of the circuit. However, the JTAG port can be also exploited by attackers to mount several cryptographic attacks. In this paper we propose a novel architecture that implements a secure JTAG interface. Our JTAG scheme allows for mutual authentication between the device and the tester. In contrast to previous work, our scheme uses provably secure asymmetric-key based authentication and verification protocols. The complete scheme is implemented in hardware and integrated with the standard JTAG interface. Detailed area and timing results are also presented.  相似文献   
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