VLC Enabled Hybrid Wireless Network for B5G/6G Communications

Wireless Personal Communications - In the present scenario, there is a boom in the demand of the users to achieve increased capacity, high data, low latency, and high-performance rates. 5G New...     

The relationship between highly-cited papers and the frequency of citations to other papers within-issue among three top information science journals

Scientometrics - This study investigates a potential relationship between highly-cited scholarly papers and the number of citations received by other papers with which they share a journal issue....     

Impact of adhesive ingredients on adhesion between rubber and brass-plated steel wire in tire

Proficiency on underlying mechanism of rubber-metal adhesion has been increased significantly in the last few decades. Researchers have investigated the effect of various ingredients, such as hexamethoxymethyl melamine, resorcinol, cobalt stearate, and silica, on rubber-metal interface. The role of each ingredient on rubber-metal interfacial adhesion is still a subject of scrutiny. In this article, a typical belt skim compound of truck radial tire is selected and the effect of each adhesive ingredient on adhesion strength is explored. Out of these ingredients, the effect of cobalt stearate is found noteworthy. It has improved adhesion strength by 12% (without aging) and by 11% (humid-aged), respectively, over control compound. For detailed understanding of the effect of cobalt stearate on adhesion, scanning electron microscopy and energy dispersive spectroscopy are utilized to ascertain the rubber coverage and distribution of elements. X-ray photoelectron spectroscopy results helped us to understand the impact of Cu_XS layer depth on rubber-metal adhesion. The depth profile of the Cu_XS layer was found to be one of the dominant factors of rubber-metal adhesion retention. Thus, this study has made an attempt to find the impact of different adhesive ingredients on the formation of Cu_XS layer depth at rubber-metal interface and establish a correlation with adhesion strength simultaneously.     

A study of the energy consumption characteristics of cryptographic algorithms and security protocols

Security is becoming an everyday concern for a wide range of electronic systems that manipulate, communicate, and store sensitive data. An important and emerging category of such electronic systems are battery-powered mobile appliances, such as personal digital assistants (PDAs) and cell phones, which are severely constrained in the resources they possess, namely, processor, battery, and memory. This work focuses on one important constraint of such devices-battery life-and examines how it is impacted by the use of various security mechanisms. In this paper, we first present a comprehensive analysis of the energy requirements of a wide range of cryptographic algorithms that form the building blocks of security mechanisms such as security protocols. We then study the energy consumption requirements of the most popular transport-layer security protocol: Secure Sockets Layer (SSL). We investigate the impact of various parameters at the protocol level (such as cipher suites, authentication mechanisms, and transaction sizes, etc.) and the cryptographic algorithm level (cipher modes, strength) on the overall energy consumption for secure data transactions. To our knowledge, this is the first comprehensive analysis of the energy requirements of SSL. For our studies, we have developed a measurement-based experimental testbed that consists of an iPAQ PDA connected to a wireless local area network (LAN) and running Linux, a PC-based data acquisition system for real-time current measurement, the OpenSSL implementation of the SSL protocol, and parameterizable SSL client and server test programs. Based on our results, we also discuss various opportunities for realizing energy-efficient implementations of security protocols. We believe such investigations to be an important first step toward addressing the challenges of energy-efficient security for battery-constrained systems.     

Partitioned encoding schemes for algorithm-based fault tolerance inmassively parallel systems

Considers the applicability of algorithm based fault tolerance (ABET) to massively parallel scientific computation. Existing ABET schemes can provide effective fault tolerance at a low cost For computation on matrices of moderate size; however, the methods do not scale well to floating-point operations on large systems. This short note proposes the use of a partitioned linear encoding scheme to provide scalability. Matrix algorithms employing this scheme are presented and compared to current ABET schemes. It is shown that the partitioned scheme provides scalable linear codes with improved numerical properties with only a small increase in hardware and time overhead     

Prevalence of hepatitis B and C virus infections among haemodialysis patients in Pune (western India)

Vascular injuries may occur as complications of elbow dislocation and usually involve the brachial artery. A case report is presented in which only the radial artery was compromised as a result of the dislocation.     

A VLSI architecture for a half-edge-based corner detector

Corner detection is a low-level feature detection operator that is of great use in image processing applications, for example, optical flow and structure from motion by image correspondence. The detection of corners is a computationally intensive operation. Past implementations of corner detection techniques have been restricted to software. In this paper we propose an efficient very large-scale integration (VLSI) architecture for detection of corners in images. The corner detection technique is based on the half-edge concept and the first directional derivative of Gaussian. Apart from the location of the corner points, the algorithm also computes the corner orientation and the corner angle and outputs the edge map of the image. The symmetrical properties of the masks are utilized to reduce the number of convolutions effectively, from eight to two. Therefore, the number of multiplications required per pixel is reduced from 1800 to 392. Thus, the proposed architecture yields a speed-up factor of 4.6 over conventional convolution architectures. The architecture uses the principles of pipelining and parallelism and can be implemented in VLSI.     

FluNet: A hybrid internet simulator for fast queue regimes

Motivated by the scale and complexity of simulating large-scale networks, recent research has focused on hybrid fluid/packet simulators, where fluid models are combined with packet models in order to reduce simulation complexity as well as to track dynamics of end-sources accurately. However, these simulators still need to track the queuing dynamics of network routers, leading to considerable simulation complexity in a large-scale network model. In this paper, we propose a new hybrid simulator – FluNet – where queueing dynamics are not tracked, but instead, an equivalent rate-based model is used. The FluNet simulator is predicated on a fast-queueing regime at bottleneck routers, where the queue length fluctuates on a faster time-scale than end systems. This allows us to simulate large-scale systems, where the simulation “time step-size” is governed only by the time-scale of the end-systems, and not by that of the intermediate routers; whereas a queue-tracking based fluid simulator would require decreasingly smaller step-sizes as the system scale size increases. We validate our model using a ns-2 based implementation. Our results indicate a good match between packet systems and the associated FluNet system.