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1.
Saponara S. Fanucci L. Marsi S. Ramponi G. Kammler D. Witte E.M. 《Circuits and Systems II: Express Briefs, IEEE Transactions on》2007,54(7):596-600
This brief presents an application-specific instruction-set processor (ASIP) for real-time Retinex image and video filtering. Design optimizations are addressed at algorithmic and architectural levels, the latter including a dedicated memory structure, an adapted pipeline, bypasses, a custom address generator and special looping structures. Synthesized in CMOS technology, the ASIP stands for its better energy-flexibility tradeoff versus reference ASIC and digital signal processing Retinex implementations. 相似文献
2.
Sergio Saponara Nicola E. L’Insalata Luca Fanucci 《Microprocessors and Microsystems》2009,33(3):191-200
The paper presents an automated environment for fast design space exploration and automatic generation of FFT/IFFT macrocells with minimum circuit and memory complexity within the numerical accuracy budget of the target application. The effectiveness of the tool is demonstrated through FPGA and CMOS implementations (90 nm, 65 nm and 45 nm technologies) of the baseband processing in embedded OFDM transceivers. Compared with state-of-art FFT/IFFT IP cores, the proposed work provides macrocells with lower circuit complexity while keeping the same system performance (throughput, transform size and accuracy) and is the first addressing the requirements of all OFDM standards including MIMO systems: 802.11 WLAN, 802.16 WMAN, Digital Audio and Video Broadcasting in terrestrial, handheld and hybrid satellite-scenarios, Ultra Wide Band, Broadband on Power Lines, xDSL. 相似文献
3.
Sergio Saponara Michele Casula Luca Fanucci 《Journal of Real-Time Image Processing》2008,3(3):201-216
To meet both flexibility and performance requirements, particularly when implementing high-end real-time image/video processing
algorithms, the paper proposes to combine the application specific instruction-set processor (ASIP) paradigm with the reconfigurable
hardware one. As case studies, the design of partially reconfigurable ASIP (r-ASIP) architectures is presented for two classes
of algorithms with widespread diffusion in image/video processing: motion estimation and retinex filtering. Design optimizations
are addressed at both algorithmic and architectural levels. Special processor concepts used to trade-off performance versus
flexibility and to enable new features of post-fabrication configurability are shown. Silicon implementation results are compared
to known ASIC, DSP or reconfigurable designs; the proposed r-ASIPs stand for their better performance–flexibility figures
in the respective algorithmic class.
Sergio Saponara got the Laurea degree, cum laude, and the Ph.D. in Electronic Engineering from the University of Pisa in 1999 and 2003, respectively. In 2002, he was with IMEC, Leuven (B), as Marie Curie Research Fellow. Since 2001, he collaborates with Consorzio Pisa Ricerche-TEAM in Pisa. He is senior researcher at the University of Pisa in the field of VLSI circuits and systems for telecom, multimedia, space and automotive applications. He is co-author of more than 80 scientific publications. He holds the chair of electronic systems for automotive and automation at the Faculty of Engineering. Michele Casula received the Laurea degree in Electronic Engineering from the University of Pisa in 2005. Since 2006, he is pursuing a Ph.D. degree in Information Engineering at the same university. His current interests involve VLSI circuits design, computer graphics, and Network-on-Chips. Luca Fanucci received the Laurea degree and the Ph.D. degree in Electronic Engineering from the University of Pisa in 1992 and 1996, respectively. From 1992 to 1996, he was with ESA/ESTEC, Noordwijk (NL), as a research fellow. From 1996 to 2004, he was a senior researcher of the Italian National Research Council in Pisa. He is Professor of Microelectronics at the University of Pisa. His research interests include design methodologies and hardware/software architectures for integrated circuits and systems. Prof. Fanucci has co-authored more than 100 scientific publications and he holds more than ten patents. 相似文献
Luca FanucciEmail: |
Sergio Saponara got the Laurea degree, cum laude, and the Ph.D. in Electronic Engineering from the University of Pisa in 1999 and 2003, respectively. In 2002, he was with IMEC, Leuven (B), as Marie Curie Research Fellow. Since 2001, he collaborates with Consorzio Pisa Ricerche-TEAM in Pisa. He is senior researcher at the University of Pisa in the field of VLSI circuits and systems for telecom, multimedia, space and automotive applications. He is co-author of more than 80 scientific publications. He holds the chair of electronic systems for automotive and automation at the Faculty of Engineering. Michele Casula received the Laurea degree in Electronic Engineering from the University of Pisa in 2005. Since 2006, he is pursuing a Ph.D. degree in Information Engineering at the same university. His current interests involve VLSI circuits design, computer graphics, and Network-on-Chips. Luca Fanucci received the Laurea degree and the Ph.D. degree in Electronic Engineering from the University of Pisa in 1992 and 1996, respectively. From 1992 to 1996, he was with ESA/ESTEC, Noordwijk (NL), as a research fellow. From 1996 to 2004, he was a senior researcher of the Italian National Research Council in Pisa. He is Professor of Microelectronics at the University of Pisa. His research interests include design methodologies and hardware/software architectures for integrated circuits and systems. Prof. Fanucci has co-authored more than 100 scientific publications and he holds more than ten patents. 相似文献
4.
Algorithmic and architectural design for real-time and power-efficient Retinex image/video processing 总被引:1,自引:1,他引:0
Sergio Saponara Luca Fanucci Stefano Marsi Giovanni Ramponi 《Journal of Real-Time Image Processing》2007,1(4):267-283
This paper presents novel algorithmic and architectural solutions for real-time and power-efficient enhancement of images
and video sequences. A programmable class of Retinex-like filters, based on the separation of the illumination and reflectance
components, is proposed. The dynamic range of the input image is controlled by applying a suitable non-linear function to
the illumination, while the details are enhanced by processing the reflectance. An innovative spatially recursive rational
filter is used to estimate the illumination. Moreover, to improve the visual quality results of two-branch Retinex operators
when applied to videos, a novel three-branch technique is proposed which exploits both spatial and temporal filtering. Real-time
implementation is obtained by designing an Application Specific Instruction-set Processor (ASIP). Optimizations are addressed
at algorithmic and architectural levels. The former involves arithmetic accuracy definition and linearization of non-linear
operators; the latter includes customized instruction set, dedicated memory structure, adapted pipeline, bypasses, custom
address generator, and special looping structures. The ASIP is synthesized in standard-cells CMOS technology and its performances
are compared to known Digital signal processor (DSP) implementations of real-time Retinex filters. As a result of the comparison,
the proposed algorithmic/architectural design outperforms state-of-art Retinex-like operators achieving the best trade-off
between power consumption, flexibility, and visual quality.
Sergio Saponara is a Research Scientist and Assistant Professor at the University of Pisa. He was born in Bari, Italy, in 1975. He received the Electronic Engineering degree cum laude and the Ph.D. in Information Engineering, both from Pisa University, in 1999 and 2003, respectively. Since 2001 he collaborates with Consorzio Pisa Ricerche, Italy and in 2002 he was with IMEC, Belgium as Marie Curie research fellow. His research and teaching interests include electronic circuits and systems for multimedia, telecom and automation. He co-authored more than 40 papers including journals, conferences and patents. Luca Fanucci is Associate Professor of Microelectronics at the University of Pisa. He was born in Montecatini, Italy, in 1965. He received the Doctor Engineer degree and the Ph.D. in Electronic Engineering from the University of Pisa in 1992 and 1996, respectively. From 1992 to 1996, he was with the European Space Agency's Research and Technology Center, Noordwijk, The Netherlands, and from 1996 to 2004 he was a Research Scientist of the Italian National Research Council in Pisa. His research interests include design technologies for integrated circuits and systems, with emphasis on system-level design, hardware/software co-design and low-power. He co-authored more than 100 journal/conference papers and holds more than 10 patents. Stefano Marsi was born in Trieste, Italy, in 1963. He received the Doctor Engineer degree in Electronic Engineering (summa cum laude) in 1990 and the Ph.D. degree in 1994. Since 1995 he has held the position of researcher in the Department of Electronics at the University of Trieste where he is the teacher of courses in electronic field. His research interests include non-linear operators for image and video processing and their realization through application specific electronics circuits. He is author or co-author of more than 40 papers in international journals, proceedings of international conferences or contributions in books. Giovanni Ramponi is Professor of Electronics at the Department of Electronics of the University of Trieste, Italy. His research interests include nonlinear digital signal processing, and the enhancement and feature extraction in images and image sequences. Prof. Ramponi has been an Associate Editor of the IEEE Signal Processing Letters and of the IEEE Transactions on Image Processing; presently is an AE of the SPIE Journal of Electronic Imaging. He has participated in various EU and National Research Projects. He is the co-inventor of various pending international patents and has published more than 140 papers in international journals and conference proceedings, and as book chapters. Prof. Ramponi contributes to several undergraduate and graduate courses on digital signal processing. 相似文献
Giovanni RamponiEmail: |
Sergio Saponara is a Research Scientist and Assistant Professor at the University of Pisa. He was born in Bari, Italy, in 1975. He received the Electronic Engineering degree cum laude and the Ph.D. in Information Engineering, both from Pisa University, in 1999 and 2003, respectively. Since 2001 he collaborates with Consorzio Pisa Ricerche, Italy and in 2002 he was with IMEC, Belgium as Marie Curie research fellow. His research and teaching interests include electronic circuits and systems for multimedia, telecom and automation. He co-authored more than 40 papers including journals, conferences and patents. Luca Fanucci is Associate Professor of Microelectronics at the University of Pisa. He was born in Montecatini, Italy, in 1965. He received the Doctor Engineer degree and the Ph.D. in Electronic Engineering from the University of Pisa in 1992 and 1996, respectively. From 1992 to 1996, he was with the European Space Agency's Research and Technology Center, Noordwijk, The Netherlands, and from 1996 to 2004 he was a Research Scientist of the Italian National Research Council in Pisa. His research interests include design technologies for integrated circuits and systems, with emphasis on system-level design, hardware/software co-design and low-power. He co-authored more than 100 journal/conference papers and holds more than 10 patents. Stefano Marsi was born in Trieste, Italy, in 1963. He received the Doctor Engineer degree in Electronic Engineering (summa cum laude) in 1990 and the Ph.D. degree in 1994. Since 1995 he has held the position of researcher in the Department of Electronics at the University of Trieste where he is the teacher of courses in electronic field. His research interests include non-linear operators for image and video processing and their realization through application specific electronics circuits. He is author or co-author of more than 40 papers in international journals, proceedings of international conferences or contributions in books. Giovanni Ramponi is Professor of Electronics at the Department of Electronics of the University of Trieste, Italy. His research interests include nonlinear digital signal processing, and the enhancement and feature extraction in images and image sequences. Prof. Ramponi has been an Associate Editor of the IEEE Signal Processing Letters and of the IEEE Transactions on Image Processing; presently is an AE of the SPIE Journal of Electronic Imaging. He has participated in various EU and National Research Projects. He is the co-inventor of various pending international patents and has published more than 140 papers in international journals and conference proceedings, and as book chapters. Prof. Ramponi contributes to several undergraduate and graduate courses on digital signal processing. 相似文献
5.
This work compares the inhibition of cAMP-phosphodiesterase in rat adipose tissue by a mixture of Ginkgo biloba biflavones with the effect of individual dimeric flavonoids. The degree of enzyme inhibition by G. biloba biflavones was amentoflavone > bilobetin > sequoiaflavone > ginkgetin = isoginkgetin. Sciadopitysin was almost inactive. 相似文献
6.
Polymer and polymer based composite structures exhibit time-dependent response, leading to their being described as viscoelastic bodies. The rate of creep (or stress relaxation) in viscoelastic bodies increases with increasing the temperature of the bodies. In this study, we are interested in analyzing the time-dependent response of smart sandwich composites comprising of glass fiber reinforced polymer (GFRP) skins, polyurethane foam core, and lead zirconate titanate (PZT) wafers embedded in the GFRP skins. The PZT is used to monitor lifetime performance of sandwich composites. A multi-scale model is developed to integrate different constitutive models of the constituents in the sandwich structures. Quasi-static and creep tests are conducted for bulk epoxy, GFRP, polyurethane foam, and sandwich specimens under uniaxial tension and bending. The tests were done at room temperature and at 80 °C. The experimental data are used for material characterization and model verification. The multi-scale model that is developed can be used to understand the effect of different responses of the constituents on the overall time-dependent behavior of sandwich structures and examine the feasibility of using PZT wafers for monitoring lifetime performance of sandwich structures. 相似文献
7.
The problem of an efficient very large scale integration (VLSI) realization of the direct/inverse fast Fourier transform (FFT/IFFT) for digital subscriber line (DSL) applications is addressed in this paper. The design of scalable and very high-rate (VDSL) modem claims for large and high-throughput complex FFT computations while for massive and fast deployment of the xDSL family low-cost and low-power constraints are key issues. Throughout the paper we explore the design space at different levels (algorithm, arithmetic accuracy, architecture, technology) to achieve the best trade-off between processing performance, hardware complexity and power consumption. A programmable VLSI processor based on a FFT/IFFT cascade architecture plus pre/post-processing stages is discussed and characterized from the high-level choices down to the gate-level synthesis. Furthermore low-power design techniques, based on clock gating and data driven switching activity reduction, are used to decrease the power consumption exploiting the correlation of the FFT/IFFT coefficients and the statistics of the input signals. To this aim both frequency-division and time-division duplex schemes have been considered. The effects of supply voltage scaling and its consequence on circuit performance are examined in detail, as well as the use of different target technologies. Synthesis results for a 0.18 μm CMOS standard-cells technology show that the processor is suitable for real-time modulation and demodulation in scalable full-rate VDSL modem (64-4096 complex FFT, 20 Msample/s) with a power consumption of few tens of mW. These performances are very interesting when compared to state-of-the-art software implementations and custom VLSI ones. 相似文献
8.
Test specimens following ASTM D638 standards are frequently used to measure the tensile properties of reinforced and unreinforced polymers machined with traditional machining and emerging manufacturing methods (additive manufacturing/3D printing). However, designs of large engineering structures may rely on mechanical properties based on ASTM D3039 for fiber-reinforced polymer composites. This parametric study examines the scaling effects present in uniaxial tensile test specimens of molded high-density polyethylene (HDPE), with geometries ranging from Types I to IV of ASTM D638 to ASTM D3039. HDPE is a thermoplastic polymer that is recyclable, can be 3D-printed, and has a wide range of engineering applications, from bottles to pipes to radiation protection shielding. The mechanical properties test results for the molded HDPE samples are validated using a Monte Carlo simulation to estimate uncertainties for the probability distribution of maximum stress at the yield point. A Finite Element study based on the empirical model shows how the proposed approach can be adopted for design purposes. The results of this work are a useful tool to enhance confidence in the tensile mechanical properties of ASTM D638 Types II and IV geometries as statistically similar to those of ASTM D3039 samples, impacting engineering designs with traditional and emerging manufacturing methods. 相似文献
9.
10.
The effects of temperatures and volumetric expansion on the diffusion of fluids through solid polymers
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Yiming Fan Antonio Gomez Serena Ferraro Brian Pinto Anastasia Muliana Valeria La Saponara 《应用聚合物科学杂志》2017,134(31)
This study examines moisture sorption behaviors of two glassy polymers, epoxy and vinylester, immersed in different fluids at two temperatures below the glass transition temperatures of the polymers. The main purpose of this study is to understand the effect of volume‐dependent temperatures and deformations on the diffusion process of solid polymers. Diffusivity coefficients are first determined by assuming the diffusion to follow the classical Fickian diffusion. In some cases, moisture sorption led to quite significant changes of volume, and the diffusion process cannot be well described by the Fickian diffusion. In such situation, the coupled deformation–diffusion model for linear elastic isotropic materials presented by Gurtin 1 is adopted, as a first approximation. This coupled deformation‐diffusion model reduces to a Fickian diffusion model when the coupling parameters are absent and the volume changes in the solid polymers during diffusion are negligible. A finite difference method is used in order to solve for the coupled deformation‐diffusion model. The model is used to predict the one‐dimensional moisture diffusion in thin plates and the multiaxial three‐dimensional moisture diffusion in dogbone specimens. The multiaxial diffusion in the dogbone specimens is used to validate the calibrated material parameters from the standard thin plate diffusion characterization. © 2017 Wiley Periodicals, Inc. J. Appl. Polym. Sci. 2017 , 134, 45151. 相似文献