A background calibration technique for multibit/stage pipelined and time-interleaved ADCs

A digital background calibration technique to compensate for the nonlinearity and gain error in the sub-digital-to-analog converter (SDAC), and the operational amplifier finite dc gain in multibit/stage pipelined analog-to-digital converter (ADC) is proposed. By injecting subtractive calibration voltages in a modified conventional multibit multiplying DAC and performing correlation based successive coefficient measurements, a background calibration is performed. This calibration technique does not need an accurate reference voltage or an increasing in the SDAC resolution. A global gain correction essential for time-interleaved ADCs is presented. Simulation results show that in the presence of realistic capacitor and resistance mismatch and finite op-amp gain, this technique improves the linearity by several bits in single and multi-channel pipelined ADC.     

1-V DTMOS-Based Class-AB Operational Amplifier: Implementation and Experimental Results

In this paper, we describe a novel low-voltage class-AB operational amplifier (opamp) based on dynamic threshold voltage MOS transistors (DTMOS). A DTMOS transistor is a device whose gate is tied to its bulk. DTMOS transistor pseudo-pMOS differential input pairs are used for input common-mode range enhancement, followed by a single ended class-AB output. Two versions of the proposed opamp (opamp-A and opamp-B) were fabricated in a standard 0.18-mum CMOS process technology. Measurements under 5 pF and 10 kOmega load conditions gave, for opamp-A, a DC open-loop gain of 50.1 dB, and a unity gain bandwidth (GBW) of 26.2 MHz. A common-mode rejection ratio (CMRR) of 78 dB, and input and output swings of 0.7 V and 0.9 V, respectively, were achieved. Opamp-B has been optimized for biomedical applications, and is implemented to build the analog front-end part of a near-infrared spectroreflectometry (NIRS) receiver of a multi-wavelength wireless brain oxymeter apparatus. A DC open-loop gain of 53 dB, a GBW of 1.3 MHz, and input and output swings of 0.6 V and 0.8 V, respectively, were measured. Opamp-A consumes 550 muW with an input referred noise of 160 nV/radicHz at 1 kHz. Opamp-B consumes only 40 muW and exhibits a lower input referred noise of 107 nV/radicHz at 1 kHz     

Near-optimal state feedback design for singularly perturbed systems by unified approach

A near optimal state feedback design for singularly perturbed systems by a unified approach using the delta operator is presented with an example of the aircraft longitudinal motion. The main contribution of this paper is to explore the use of the i -operator that has attracted a new attention in systems science. The i -operator system unifies the continuous system and the discrete system together without loosing any characteristics of both systems. The paper offers the following; Finite-word-length-characteristics are improved using the i -operator. Floating-point-operations are reduced by block diagonalization and by time-invariant optimal feedback gain from the algebraic Riccati equation. The results of adopting those approaches are illustrated in the simulation figures and compared with the earlier one.     

System integration of high voltage electrostatic MEMS actuators

A system integration for High Voltage (HV) electrostatic MicroElectroMechanical Systems (MEMS) actuators is introduced on a micro-Printed Circuit Board. The system includes a programmable microcontroller, a programmable DC/DC converter, a multi output HV interface and electrostatic MEMS actuators. The system produces high output voltages (10–300 V) and can control a large variety of MEMS capacitive loads (1 to 50 pF) by combining diverse semiconductor technologies. This system proves that technologies, such as low voltage CMOS of different processes, high voltage DMOS and MEMS, can interact, communicate and even be integrated as a System In Package (SIP), providing significant size and cost reductions. The system was programmed to control electrostatic MEMS actuator. The DC/DC converter was made from components of different technologies and two addressable high voltage CMOS interfaces were fabricated with DALSA's 0.8 μm High Voltage process. A prototype of the global system has been built and tested.     

A Hybrid Microfluidic/CMOS Capacitive Sensor Dedicated to Lab-on-Chip Applications

A hybrid microfluidic/IC capacitive sensor is presented in this paper for highly integrated lab-on-chips (LoCs). We put forward the design and implementation of a charge based capacitive sensor array in 0.18-mum CMOS process. This sensor chip is incorporated with a microfluidic channel using direct-write microfluidic fabrication process (DWFP). The design, construction and experimental results as well are demonstrated using four different chemical solutions with known dielectric constants. The proposed highly sensitive CMOS capacitive sensor (ap530 mV/fF) along with low complexity DWFP emerges as clear favorite for LoC applications.     

A Low-Power Integrated Bioamplifier With Active Low-Frequency Suppression

We present in this paper a low-power bioamplifier suitable for massive integration in dense multichannel recording devices. This bioamplifier achieves reduced-size compared to previous designs by means of active low-frequency suppression. An active integrator located in the feedback path of a low-noise amplifier is employed for placing a highpass cutoff frequency within the transfer function. A very long integrating time constant is achieved using a small integrated capacitor and a MOS-bipolar equivalent resistor. This configuration rejects unwanted low-frequency contents without the need for input RC networks or large feedback capacitors. Therefore, the bioamplifier high-input impedance and small size are preserved. The bioamplifier, implemented in a 0.18-mum CMOS process, has been designed for neural recording of action potentials, and optimised through a transconductance-ef-ficiency design methodology for micropower operation. Measured performance and results obtained from in vivo recordings are presented. The integrated bioamplifier provides a midband gain of 50 dB, and achieves an input-referred noise of 5.6 muVrms. It occupies less than 0.050 mm² of chip area and dissipates 8.6 muW.     

A new integrated front-end for a noninvasive brain imaging system based on near-infrared spectroreflectometry

In this paper, we present a fully integrated front-end of a portable spectroreflectometry-based brain imaging system dedicated for acquisition of modulated optical signals at a frequency of 1 Hz to 25 kHz. The proposed front-end preamplifier is composed of a photodetector, a transimpedance preamplifier, a two-stage voltage amplifier and a mixer. Strict constraints regarding noise thus have to be considered. The preamplifier consists of a transimpedance block featuring a 95-dB/spl Omega/ gain and an average input current noise density at the frequency of interest of approximately 3 pA//spl radic/Hz. Each of the two subsequent voltage amplifiers allows the user to obtain an additional 25-dB gain. Considering the tuning capabilities and the losses due to the filters and the nonideal buffers, the proposed front-end allows us to obtain a total gain up to 145 dB. The back-end of the amplification chain is composed of a mixer which is used to produce a continuous voltage proportional to the amplitude of the input optical signals. All those features were integrated using CMOS 0.18-/spl mu/m technology and the experimental results are in agreement with the initial design requirements.     

High-voltage DMOS integrated circuits using floating-gate protection technique

An efficient low power protection scheme for thin gate oxide of high voltage (HV) DMOS transistor is presented. To prevent gate-oxide breakdown and protect HV transistor, the voltage controlling its gate must be within 5 V from the HV supply. Thus signals from the low voltage domain must be level shifted to control the gate of this transistor. Usually this level shifting involves complex circuits that reduce the speed besides requiring of large power and area. In this paper, a simple and efficient protection technique for gate-oxide breakdown is achieved by connecting a capacitor divider structure to the floating-gate node of HV transistor to increase its effective gate oxide thickness. Several HV circuits, including: positive and negative HV doublers and level-up shifters suitable for ultrasound sensing systems are built successfully around the proposed technique. These circuits were implemented with 0.8 μm CMOS/DMOS HV DALSA process. Simulation and experimental results prove the good functionality of the designed HV circuits using the proposed protection technique for voltages up to 200 V.