Linear CMOS transconductance element for VHF filters

A differential transconductance element based on CMOS inverters is presented. With this circuit a linear, tunable integrator for very high-frequency continuous-time integrated filters can be made. This integrator has good linearity properties (THD<0.04%, V/sub ipp/=1.8 V), nondominant poles in the gigahertz range and a 40 dB DC gain.<>     

Monogamy of correlations versus monogamy of entanglement

A fruitful way of studying physical theories is via the question whether the possible physical states and different kinds of correlations in each theory can be shared to different parties. Over the past few years it has become clear that both quantum entanglement and non-locality (i.e., correlations that violate Bell-type inequalities) have limited shareability properties and can sometimes even be monogamous. We give a self-contained review of these results and present new results on the shareability of different kinds of correlations, including local, quantum and no-signalling correlations. This includes an alternative simpler proof of the Toner-Verstraete monogamy inequality for quantum correlations, as well as a strengthening thereof. Further, the relationship between sharing non-local quantum correlations and sharing mixed entangled states is investigated, and already for the simplest case of bi-partite correlations and qubits this is shown to be non-trivial. Also, a recently proposed new interpretation of Bell’s theorem by Schumacher in terms of shareability of correlations is critically assessed. Finally, the relevance of monogamy of non-local correlations for secure quantum key distribution is pointed out, and in this regard it is stressed that not all non-local correlations are monogamous.     

New techniques for high-frequency RMS-to-DC conversion based on amultifunctional V-to-I convertor

Two bipolar RMS-DC convertor circuits of the computing type which require no rectifier function are discussed. Improved frequency response is thus obtained. RMS-to-DC computation is carried out in the current domain. To make the circuit suitable for voltage driving, a dedicated V-to-I convertor is developed. Measured 1% bandwidths of the RMS-to-DC convertors are 35 and 22 MHz, respectively. Conversion error is less than 1% for the crest factors up to five     

CMOS subnanosecond true-ECL output buffer

An emitter coupled logic (ECL) 100 K compatible output buffer circuit fabricated in a submicrometer CMOS-only process is presented. High speed (0.9-ns delay) and sufficient precision are achieved through the use of a novel circuit principle. Negative feedback and an error correction technique are applied in such a way that external components and/or additional power supplies are not required. Aspects of stability and accuracy are investigated and simulation results are discussed to explain the circuit technique. The actual design and practical aspects of it, such as layout, implementation in silicon, and technology features, are shown. Measured and simulation results, showing the good performance of the ECL output buffer across a wide range of capacitive loading, are presented     

Offset cancelling circuit

A monolithic offset cancelling circuit to reduce the offset voltage at an integrated audio-amplifier output is described. This offset voltage is detected using a low-pass filter with a very large time constant for which only one small on-chip capacitor is needed. The circuit was realized with a bipolar cell-based semicustom array. Measurements have shown that a -3-dB bandwidth below 5 Hz can be realized with a capacitor value of 50 pF. The resulting offset voltage at the audio-amplifier output was 2.5 mV. The offset cancelling circuit increases the wideband noise voltage at the audio-amplifier output by 0.15-MV RMS over the frequency range of 10 Hz to 30 kHz. The use of the offset cancelling circuit eliminates the need for a large external electrolytic capacitor. If an audio amplifier with a single supply voltage is used, a second electrolytic capacitor, needed to obtain a stable reference at half the supply voltage, can be eliminated     

Quadratic-translinear CMOS multiplier-divider circuit

A novel current-mode analogue multiplier-divider based on the quadratic-translinear principle is presented. The input and output signals are all in current-mode. The circuit has favourable precision, wide dynamic range and is insensitive to variations in temperature and processing. It is suitable for VLSI implementation and can be used in many hardware design fields such as fuzzy logic controllers and analogue neural networks     

An efficient low voltage, high frequency silicon CMOS lightemitting device and electro-optical interface

A silicon light emitting device was designed and realized utilizing a standard 2-μm industrial CMOS technology design and processing procedure. The device and its associated driving circuitry were integrated in a CMOS integrated circuit and can interface with a multimode optical fiber. The device delivers 8 nW of optical power (450-850 nm wavelength) per 20-μm diameter of chip area at 4.0 V and 5 mA. The device emits light by means of a surface assisted Zener breakdown process that occurs laterally between concentrically arranged highly doped n⁺ rings and a p⁺ centroid, which are all coplanarly arranged with an optically transparent Si-SiO₂ interface. Theoretical and experimental determinations with capacitances and series resistances indicate that the device has an intrinsic high-frequency operating capability into the near gigahertz range     

Current-mode techniques for high-speed VLSI circuits withapplication to current sense amplifier for CMOS SRAM's

The speed of VLSI chips is increasingly limited by signal delay in long interconnect lines. A simple analysis shows that major speed improvements are possible when using current-mode rather than conventional voltage-mode signal transporting techniques. The key to this approach is the use of low-resistance current-signal circuits to drastically reduce the impedance level and the voltage swings on long interconnect lines. As an example, a simple four-transistor current-sense amplifier for fast CMOS SRAMs is proposed. The circuit presents a virtual short circuit to the bit lines, thus reducing the sensing delay, which is rendered practically insensitive to the bit-line capacitance. In addition, the virtual short circuit ensures equal bit-line voltages, thus eliminating the need for bit-line equalization during a read access     

Optimal radix for monolithic memories

Multivalued storage elements are of interest in the quest for higher information density of monolithic memories. The optimal radix to be used is a compromise between information content and cost factors such as silicon-chip area. Formulas are developed which enable the optimal radix to be found. Some recently proposed multivalued storage elements are evaluated for optimal radix by means of the derived formulas.