Effect of bipolar turn-on on the static current-voltagecharacteristics of scaled vertical power DMOSFET's

The parasitic bipolar transistor inherent in the power vertical Double Diffused MOSFET (DMOSFET) structure can have a significant impact on its performance and reliability. Selectively formed TiSi₂ films on source contacts were used to reduce the contact resistance to n ⁺ source diffusion. These devices exhibit “kinks” in the output I-V characteristics. High contact resistance of TiSi₂ to moderately doped p-body diffusion causes high output conductance. Detailed two-dimensional numerical simulations are used to investigate the effect of the parasitic bipolar transistor on the static characteristics of scaled silicided DMOSFET's. The high contact resistance of TiSi₂-p-body interface leads to a floating potential and causes significant reduction in the MOS gate threshold voltage and results in a premature bipolar turn-on. It is shown that the parasitic bipolar turn-on places an important constraint on the scalability of the device into the submicron regime. A novel self-aligned DMOSFET structure with a shallow diffused p⁺ region is shown to eliminate this effect. Numerical simulations are shown to be in excellent agreement with the measured data at various temperatures     

Studies in dyeing. II. Effect of crystal modification of disperse dyes on polyester dyeing at 130°C

Four commercial disperse dyes were purified and their different crystal forms were prepared by crystallizing from different solvents or precipitating from their solutions in glacial acetic acid by dilution with water. These forms were found to have different melting points. They were dyed on polyester fibers at 130°C to fiber saturation values by changing the dyebath every 15 min. The effect of pretreatment of the dyes in an aqueous environment at different temperatures (60°, 100°, and 130°C) for 15–60 min in the presence and absence of a dispersing agent on the dye uptake values was also studied. Such treatments are shown to reduce the dye uptake. The implication of these treatments in practical dyeing are pointed out.     

An improved approach to application-specific power electronicseducation-switch characterization and modeling

An integrated power electronics curriculum has been implemented in the Department of Electrical and Computer Engineering at the University of Illinois, Chicago. This paper describes the development of a set of hands-on laboratory experiments to accompany classroom lectures. Content is based on switching converter topologies and commercial power semiconductor devices. Unlike most experiments, which focus on circuit- or control-level characteristics, our approach emphasizes the circuit-device-load interactions. The concept presented is innovative in that it creates a 3×3 matrix of experiment variation-devices, circuits-control, and machines-loads-with one set of hardware. The lab development is ongoing with future experiments to address three-phase converters and motor control applications. Experiment content is described, as well as the means by which the material has been integrated within the course sequence. Lab station construction and safety issues are also addressed. The experiments require hands-on measurement and circuit connection and complement the established course elements of theory and computer-based circuit modeling. Laboratory experiments and computer simulations collectively provide quantitative evidence of mixed circuit and device optimization     

A 55-V, 0.2-mΩ-cm2 vertical trench power MOSFET

Experimental results that demonstrate trench power MOSFETs with a specific on-state resistance of 0.2 mΩ-cm² and capable of sustaining 55 V across drain-source terminals in the off state are discussed. This performance was achieved by using an improved silicon trench processing technology. The forward conductivity reported is the highest ever obtained for a silicon power device     

A 50-V, 0.7-mΩ×cm2, vertical-power DMOSFET

A 50-V vertical power MOSFET with extremely low specific on resistance is reported. Devices with a cell density as high as 8 million cells/in² and capable of switching 160 A of current have been successfully fabricated using an improved fabrication technology which used low processing temperatures, double-layer interlevel dielectric, shallow source implants, and an improved source contact metallurgy. The lowest measured specific on resistances are 0.8 and 0.7 mΩ×cm², respectively, under continuous and pulsed bias conditions for FETs capable of blocking 50 V in the reverse direction. This result represents the best ever reported forward conductivity for a 50-V power MOSFET     

An improved approach to application-specific power electronicseducation. Curriculum development

This paper presents an innovative power electronics curriculum spanning the undergraduate and graduate programs. The curriculum develops the basic concepts of the field and applies them to modern industrial challenges to solve practical problems. It is based on three fundamental disciplines: switching devices, circuits and topologies and control and drives. The curriculum, which will facilitate the development of optimal systems, bridges the gap between power semiconductor devices and circuit design. An underlying principle of the curriculum is the development of optimal application-specific power electronics systems, achieved primarily through optimization of power semiconductor devices. The curriculum is described in detail with an emphasis on the courses pertaining to power semiconductor device physics and converter circuit design. The role of advanced computer-aided design tools is also identified and shown to facilitate an application-specific device design and optimization methodology. To further illustrate the effectiveness of this approach, two industry-relevant course projects performed in the curriculum are presented in detail     

Structural and electrical properties of furnace and rapid thermallyannealed LPCVD WSi2 films on single-crystal, polycrystalline,and amorphous silicon substrates

Alternate approaches to obtain low-resistance, low-pressure chemical vapor deposition (LPCVD) WSi₂ films for application as interconnections in silicon integrated circuit technologies were investigated. The silicide films were deposited on three different substrates and annealed in two different systems. The silicide films deposited on the doped substrates as well as films doped using ion implantation were analyzed. The silicide microstructure, electrical film conductivity, and dopant redistribution were studied as a function of the process variants. An optimum set of annealing conditions were identified that resulted in excellent silicide thin-film properties. A correlation between the material and electrical properties is provided using the experimental data     

Thermal-gradient-induced interaction energy ramp and actuation of relative axial motion in short-sleeved double-walled carbon nanotubes

We investigate the phenomenon of actuation of relative linear motion in double-walled carbon nanotubes (DWNTs) resulting from a temperature gradient. Molecular dynamics simulations of DWNTs with short outer tube reveal that the outer tube is driven towards the cold end of the long inner tube. It is also found that the terminal velocity of the sleeve roughly depends linearly on the applied thermal gradient. We calculate the inter-tube interaction energy surface which is revealed to have a gradient depending upon the applied thermal gradient. Consequently, it is proposed that the origin of the thermophoretic motion of the outer tube may be attributed partially to the existence of such an energy gradient. A simple analytical model is presented accounting for the gradient in energy profile as well as the effect of biased thermal noise. It is shown that the proposed model predicts the dynamical behaviour of the long-time performance reasonably well.     

Manufacturability issues related to transient thermal annealing oftitanium silicide films in a rapid thermal processor

Transient thermal annealing of sputtered titanium films in a rapid thermal processor (RTP) is critically evaluated from the viewpoint of manufacturability-related considerations. In particular, the thin-film properties of the resulting titanium silicide on polysilicon and silicon, process uniformity, and unit step wafer yield of high-density scaled device structures are investigated. The experimental results suggest that RTP silicides show good thin-film properties for manufacturability on planar wafer surfaces. Transient thermal gradients in an RTP system are shown to cause substantial variations in the electrical and structural properties of TiSi_x films formed on silicon substrates with varying substrate thicknesses. Closed-loop temperature control in an RTP reactor provided stoichiometrically identical TiSi_x films with negligible substrate thickness dependence. The experimental results also suggest that careful wafer surface temperature control is needed when forming titanium silicide films on nonplanar silicon surfaces, silicon trenches, and process monitor wafers without predetermined wafer thicknesses     

Potential impact of emerging semiconductor technologies on advancedpower electronic systems

It is shown that a simple expression for k_D= R_on×C_in of a power semiconductor device can be used to evaluate the optimum performance feasible from a given material technology. A high-density, high-frequency microelectronic power supply based on synchronous rectifier switching topology is used to illustrate the potential impact of emerging semiconductor technologies on advanced power electronic systems. It is shown that optimum power devices based on wide-energy-bandgap semiconductors such as silicon carbide and diamond provide the basis for power conversion at very high frequencies