An Analog Self-Test Based on Differential I DD Monitoring Supported by Differential I OUT Checking

This paper proposes a novel DFT scheme that combines two test techniques—differential power supply current (I _DD ) monitoring and differential output current (I _OUT ) checking—in a single analog self-test. The DFT scheme is aimed at fully differential analog circuits. Fault detection is provided by means of differential measurement of the on-chip parameters, such as the I _DD and I _OUT currents. Due to the differential nature of the test principle used, no reference measurement is required prior to the test, thus the fault detection exhibits a significantly reduced dependency on process parameter variations, variation of temperature during the test as well as outside interference's. Based on measurement results, the realistic tolerance band for fault detection was determined and the fault coverage, resulting from previous simulation experiments, was adjusted.     

Implementation of BIC monitor in balanced analogue self-test

The authors present the design of a dynamic built-in current (BIC) monitor for a new on-chip analogue self-test methodology. This methodology uses dynamic power supply current monitoring, and takes advantage of a redundancy in the structure of fully balanced circuits. The dynamic BIC monitor is based on a second generation current conveyor CCII+, and offers accurate measurement of supply current with minimal degradation in power supply voltage