Fractional delay sigma-delta upconverter

A new architecture for IF to RF conversion is presented. The architecture is based on a tunable continuous-time bandpass /spl Sigma//spl Delta/ modulator with fractional delay in combination with a Manchester coder and decoder. The suitability of the proposed architecture is discussed in the context of a software-defined radio. Mixed-signal behavioural simulations confirm the validity of the concept.     

Tunable continuous-time bandpass /spl Sigma//spl Delta/ modulators with fractional delays

An analytical design methodology for continuous-time (CT) bandpass (BP) /spl Sigma//spl Delta/ modulators is presented. Second- and fourth-order tunable continuous time BP /spl Sigma//spl Delta/ modulator design equations are presented. A novel /spl Sigma//spl Delta/ loop architecture, where the traditional CT BP loop filter function is replaced with the filter function with fractional delays, is proposed. Validity of the methodology is confirmed by mixed-signal behavioral simulations.     

Manchester encoded bandpass sigma-delta modulation for RF class D amplifiers

An analysis of a continuous-time bandpass sigma-delta modulator in a configuration with an upconverter is given for a RF class D amplifier application. The upconverter multiplies the modulator pulse train with a synchronised clock signal and maps each modulator bit to an integer multiple k of a (+1, -1) or (-1, +1) pattern depending on the sign of the modulator bit. The upconversion is equivalent to an extension of Manchester encoding, which is usually defined for k=1. The analysis focuses on evaluating the impact of upconversion on the modulator coding efficiency and the average pulse period. A design equation is derived, which shows that coding efficiency is dependent only on the upconversion frequency ratio, while the average pulse period depends only on k. The equations provide a designer with a way of evaluating the trade-offs in the amplifier system and show that encoding with k=1 is the most efficient configuration for maximising coding efficiency and minimising switching power loss     

Analogue portable electrooculogram real‐time signal processor

We present an analogue signal‐processing circuit suitable for applications in a portable, wearable, non‐invasive electrooculogram‐based human–computer interface. Behavioural model and preliminary experimental results confirm that the proposed circuit, while operating in real time, correctly detects and decodes signals generated by the subject's eye movements. The total power consumption is measured at 145 mW (excluding the RF link) with a 3 V power supply voltage, and the unit size is approximately 5 cm × 3 cm printed circuit board. Copyright © 2012 John Wiley & Sons, Ltd.