Thermoelectric-powered convective cooling of microprocessors

Forced convection cooling of a personal computer microprocessor, using power generated by thermoelectric (TE) conversion, has been modeled, analyzed, and demonstrated. This study was motivated by the desire to meet the demanding cooling requirements of notebook computers without consuming valuable battery power. The modest power generated by the TE necessitated a careful match between the TE device and the fan/heat-sink sub-system. The models and methodology used to maximize the cooling capability of TE-powered convection are presented and experimentally validated using a notebook computer prototype. In the experimental study described herein, a commercial fan was successfully driven by electricity generated from the heat of the microprocessor. It was determined that, at a junction temperature of 95 /spl deg/C, thermoelectric-powered cooling could perform nearly four times better than the best natural convection design.     

Comprehensive System-Level Optimization of Thermoelectric Devices for Electronic Cooling Applications

Advanced cooling solutions are needed to address the growing challenges posed by future generations of microprocessors. This paper outlines an optimization methodology for electronic system based thermoelectric (TE) cooling. This study stresses that an optimum TE cooling system should keep the electronic device below a critical junction temperature while utilizing the smallest possible heat sink. The methodology considers the electric current and TE geometry that will minimize the junction temperature. A comparison is made between the junction temperature minimization scheme and the more conventional coefficient of performance (COP) maximization scheme. It is found that it is possible to design a TE solution that will both maximize the COP and minimize the junction temperature. Experimental measurements that validate the modeling are also presented.     

Calibration of resistance type die level temperature sensors usinga single temperature technique

Thermal test chips are widely used to develop electronic packaging thermal solutions and to evaluate electronic package assembly processes. Temperature sensors are an integral component on thermal test chips. Unfortunately, each temperature sensor must be calibrated in order for them to be effective. Each calibration can take up to one hour to complete. In a time when increasing sample sizes and shorter development cycles are taxing current equipment and manpower resources, new calibration techniques must be established to keep development costs down. This paper discusses simplified calibration procedures, which can significantly reduce the time needed for temperature sensor calibration. The simplified calibration procedures utilize single-resistance measurements either at room temperature or at the anticipated test temperature. For four different test chip designs included in the current study, calibration error variations less than ±0.6°C at a ±2σ confidence level are possible. The simplified calibration procedures can be applied to any resistor type temperature sensor that has a linear correlation between its electric resistive properties and temperature