Nondemolition quantum filtering

In this paper, the basic ideas of the modern quantum theory of measurements continuous in time are presented. We recall the difficulties of the standard formulation of quantum mechanics in describing the process of measurement and discuss the attempts of to overcome them in the framework of quantum stochastic calculus.     

Advanced data pre-processing for damage identification based on pattern recognition

Data pre-processing forms an important element of pattern recognition procedures for mechanical and structural damage detection. This paper discusses feature extraction and selection procedures. The discussion is focused on time-frequency and time-scale analysis. Case studies of damage detection exercises are presented for illustration.     

Software Assisted Digital RF Processor (DRP™) for Single-Chip GSM Radio in 90 nm CMOS

This paper proposes and describes a new software and application programming interface view of an RF transceiver. It demonstrates benefits of using highly programmable digital control logic in an RF wireless system realized in a digital nanoscale CMOS process technology. It also describes a microprocessor architecture design in Digital RF Processor (DRP™) and how it controls calibration and compensation for process, temperature and voltage variations of the analog and RF circuits to meet the required RF performance. A few calibration examples to reduce a DCO bias current and improve device reliability, as well as to optimize transmit modulation and receive performance, are given. The presented circuits and techniques have enabled successful implementation of a commercial single-chip GSM radio in 90 nm CMOS.      

Direct frequency modulation of an ADPLL for bluetooth/GSM with injection pulling elimination

We propose and demonstrate a Gaussian frequency-shift keying and Gaussian minimum-shift keying (GMSK) pulse-shape filtering for wireless RF transmitters with an arbitrary reference frequency. The filter is software controlled to work in a multistandard radio. Spurs, which are due to the frequency injection pulling, in cases when the reference harmonics are close enough to the oscillating frequency, are avoided by means of retiming the reference clock by the RF oscillator. Baseband clock for the pulse-shape filtering is derived through a simple fractional-N division of the reference frequency. This saves area and power since it is no longer required to create a low-jitter clock for baseband symbol generation and modulating data. It is especially advantageous when the available reference frequency is not an integer multiple of the symbol rate. The presented transmitter is realized without any explicit analog filtering and is part of a commercial single-chip fully compliant Bluetooth radio fabricated in a digital 130-nm CMOS process. We demonstrate the software programming capability through an experimental GMSK modulation for the global system for mobile communication.     

Adsorption on Ligand-Tethered Nanoparticles

We use coarse-grained molecular dynamics simulations to study adsorption on ligand-tethered particles. Nanoparticles with attached flexible and stiff ligands are considered. We discuss how the excess adsorption isotherm, the thickness of the polymer corona, and its morphology depend on the number of ligands, their length, the size of the core, and the interaction parameters. We investigate the adsorption-induced structural transitions of polymer coatings. The behavior of systems involving curved and flat “brushes” is compared.     

Speed, power, area, and latency tradeoffs in adaptive FIR filteringfor PRML read channels

In this paper, we describe area and power reduction techniques for a low-latency adaptive finite-impulse response filter for magnetic recording read channel applications. Various techniques are used to reduce area and power dissipation while speed and latency remain as the main performance criteria for the target application. The proposed parallel transposed direct form architecture operates on real-time input data samples and employs a fast, low-area multiplier based on selection of radix-8 premultiplied coefficients in conjunction with one-hot encoded bus leading to a very compact layout and reduced power dissipation. Area, speed, and power comparisons with other low-power implementation options are also shown. The proposed filter has been fabricated using a 0.18-μm L-effective CMOS technology and operates at 550 MSamples/s. Trading off filter latency to improve speed is also discussed