Noise–Power Optimization of Incremental Data Converters

Incremental data converters (IDCs) are useful in instrumentation and measurement applications, where low-frequency analog signals need to be converted into digital form with high accuracy and low power dissipation. They are particularly well suited for applications where a single analog-digital converter is multiplexed between many channels. This paper proposes an exact design methodology for IDCs, which optimizes the signal-to-noise ratio of the converter under practical design constraints. The process also allows the designer to apportion the noise budget in an arbitrary manner between thermal and quantization noise. The design process is illustrated by an example which describes the optimization of a third-order multiplexed IDC.     

Wideband low-distortion delta-sigma ADC topology

A ΔΣ topology with reduced sensitivity to opamp nonlinearities is described. The technique is effective even for very low oversampling ratios, and can be used for any modulation order. Techniques for reducing other nonideal effects are also proposed     

A 14-bit dual-path 2-0 MASH ADC with dual digital error correction

A dual-path 2-0 cascaded delta-sigma (MASH) ADC was implemented with fast digital correction of both DAC errors and MASH mismatch errors. The digital correction techniques greatly reduced the requirements on the analog circuits. The dual-path structure allows fast convergence and improved accuracy for the correction. Using a 20 MHz clock, the prototype chip achieved an 84 dB dynamic range in a 1.25 MHz signal band, when fabricated in CMOS 0.18 μm process.     

Switched-capacitor DAC with analogue mismatch correction

A background calibration method for enhancing the accuracy and linearity of a switched-capacitor digital-to-analogue converter is described. The method can be used alone or in combination with mismatch shaping to achieve very high accuracy and linearity combined with high speed     

Digital techniques for improving the accuracy of data converters

This article provides a tutorial overview of some previously developed methods for enhancing the accuracy and linearity of data converters (analog-to-digital as well as digital-to-analog) by introducing auxiliary digital circuitry which calibrates, cancels and/or corrects the errors introduced by the unavoidable inaccuracy of the analog components used in the conversion. Simple but practical examples are used to illustrate the various improvement techniques. Using the described methods, the inherent accuracy and linearity of the data conversion can be extended from about 10 bits to 16 bits and more     

Mismatch-shaping switching for two-capacitor DAC

A mismatch-shaping scheme is proposed for a two-capacitor digital-to-analogue converter (DAC). It uses a delta-sigma loop for finding the optimal switching sequence for each input word. Simulations indicate that the scheme can be used for the realisation of DACs with 16 bit linearity and SNR performance     

High-speed ΔΣ ADC with error correction

A digital error correction scheme is described for ΔΣ ADCs with multibit quantisers. It operates in the background and remains effective even for very low oversampling ratios     

HTEL: a HyperText Expression Language

In general, an expression language provides a means to indicate non‐constant values in expressions. It includes operations to combine values, but these will normally disappear when the expression is evaluated. HTEL is an expression language to produce HTML‐documents. It is presented to stimulate a discussion about the structure of hypertext expression languages. The operations have been chosen in agreement with what is strongly suggested, but not defined, by the HTML‐standard. The HTEL‐interpreter can be used for cgi‐programs, i.e. to describe reactions when data from a ‘form’ in an HTML‐document has been submitted. A special tool has been used to build the HTEL‐interpreter, as an example belonging to a family of interpreters for domain‐specific languages. Members of that family have characteristics that are closely related to structural patterns found in the mark‐ups of HTML. HTEL should also be seen as a substantial example to witness the applicability and relevance of the principles that are applied in the tool used for constructing its interpreter. Copyright © 1999 John Wiley & Sons, Ltd.