Mobile agent middleware for mobile computing

Mobile computing requires an advanced infrastructure that integrates suitable support protocols, mechanisms, and tools. This mobility middleware should dynamically reallocate and trace mobile users and terminals and permit communication and coordination of mobile entities. In addition, open and untrusted environments must overcome system heterogeneity and grant the appropriate security level. Solutions to these issues require compliance with standards to interoperate with different systems and legacy components and a reliable security infrastructure based on standard cryptographic mechanisms and tools. Many proposals suggest using mobile agent technology middleware to address these issues. A mobile agent moves entities in execution together with code and achieved state, making it possible to upgrade distributed computing environments without suspending service. We propose three mobile computing services: user virtual environment (UVE), mobile virtual terminal (MVT), and virtual resource management (VRM). UVE provides users with a uniform view of their working environments independent of current locations and specific terminals. MVT extends traditional terminal mobility by preserving the terminal execution state for restoration at new locations, including active processes and subscribed services. VRM permits mobile users and terminals to maintain access to resources and services by automatically requalifying the bindings and moving specific resources or services to permit load balancing and replication     

A very low-noise CMOS preamplifier for capacitive sensors

A CMOS preamplifier optimized for piezoelectric transducers is presented. The extensive use of CMOS-compatible lateral bipolar transistors (CLBTs) and careful layout leads to a very low noise along with good untrimmed DC and AC characteristics. These features make it competitive with bipolar and JFET realizations. In addition, long coaxial lines can be driven without significant alteration of performance using the two uncommitted on-chip buffers. This circuit was fabricated in a standard 3-μm p-well CMOS technology, opening perspectives to monolithic integration of data acquisition subsystems     

A Distributed Model of Iron Kinetics for Clinical Assessment of Normal?Abnormal Erythropoietic Activity

The use of mathematical models of iron metabolism has been recognized as an essential tool for analyzing ferrokinetic data. Multicompartment models, however, did not make it possible to describe marrow iron kinetics, taking into account that marrow erythroid cells uptake iron from the plasma according to their maturity.     

A 2-μm CMOS fifth-order low-pass continuous-time filter forvideo-frequency applications

A fifth-order elliptic low-pass continuous-time filter based on triode transconductors for applications in the video frequency range is presented. Fabricated in a standard 2-μm CMOS technology, the circuit occupies 6 mm² of silicon area including the automatic tuning circuitry. The filter achieves a 7-MHz cutoff frequency using a parasitic pole compensation scheme. The dynamic range is 40 dB and power consumption is 30 mW for a 5-V supply. A transconductor biasing strategy which allows a continuous tuning range for the cutoff frequency of one decade is presented     

Une caractérisation de technologie CMOS à l’usage d’étudiants en cycle d’ingénieur

This product is a part of a practical work set intended for students in the second year of engineering school. During the work, the student has to put into practice theoretical considerations (from courses and tutorials), as well as measurement methods in order to extract a set of parameters for theMOS transistor and theCMOS inverter. Finally, these results are analyzed in order to show the limitations of the first order graphical model used (Memelink’s model).     

Distributed logic objects

This paper presents a language based on the logic programming paradigm that supports objects, messages and inheritance. The object-oriented extension is fairly simple: objects are clusters of processes, objects' state is represented by logical variables, message-passing communication between objects is performed via multi-head clauses, and inheritance is mapped into clause union. The language implementation is obtained by translating logic objects into a concurrent logic language based on multi-head clauses, taking advantage of its distributed implementation on a massively parallel architecture. The runtime support realizes some interesting features such as intensional messages and the transparency of object allocation, object migration and parallelism.     

Compression algorithms that preserve basic topological features in binary-coded patterns

In this paper, some problems related to the recognition of plane, two-tone pictures (e.g. handprinted characters) are considered. It is assumed that suitable algorithms (already described) have been applied to the original picture, in order to obtain linearwise, two-tone figures. A problem that arises at this point is classifying these results in a suitable way; to this purpose, it is necessary to define and perform a set of measurements such that the results obtained by applying them to figures of the same class be the same, the possible ambiguity be minimal and the loss of information be as reduced as possible. In this paper, some algorithms are described that transform the figure into another one of the least possible dimensions, but retaining a set of basic topological and quasi-topological characteristics of the original picture. While implicitly defining a set of measurements to be performed, the “reduction” of the figure is implemented so that several figures having the same basic characteristics give the same “reduced” figure as final result. The considerable reduction of the figure's dimensions may furthermore make the recognition simpler. Several algorithms are described, and the results are compared; all are of parallel type, and therefore particularly suited for hardware implementation.     

Current-switching half adder

A new current-switching half adder is described; rise and fall times of about 3 ns have been obtained.