Design of integrated and autonomous conductivity–temperature–depth (CTD) sensors

Impedance characterization of interfaces is a basic technique for a large class of chemical and biological sensors. This technique is often used to model interfaces between ion-based and electron-based conductive materials by means of electric variables such as voltage, current and charge. Conductivity–temperature–depth (CTD) sensors are sophisticated devices used in the environmental monitoring field to understand the effects of climate changes on oceans and on marine organisms. They usually require impedance sensing as readout technique. High-accuracy CTD sensors are present on the market but they are bulky and power hungry. However, the downscale of modern CMOS technology allows shrinking very complex bioelectronic interfaces into millimeter square size systems, thus opening a large ground of applications. This paper will describe an IC architecture and the related design approach to implement an electrochemical impedance spectroscopy (EIS) technique for CTD sensing and will propose a general approach for sensing complex impedance with low power consumption and high precision. The presented system is designed to achieve 15-bit resolution and power consumption to ensure lifetime up to 1 year using button-size batteries in ocean environment.     

A dynamically reconfigurable monolithic CMOS pressure sensor for smart fabric

This paper presents a mixed-signal system-on-chip (SOC) for sensing capacitance variations, enabling the creation of pressure-sensitive fabric. The chip is designed to sit in the corner of a smart fabric such as elastic foam overlaid with a matrix of conductive threads. When pressure is applied to the matrix, an image is created from measuring the differences in capacitance among the rows and columns of fibers patterned on the two opposite sides of the elastic substrate. The SOC approach provides the flexibility to accommodate for different fabric sizes and to perform image enhancement and on-chip data processing. The chip has been designed in a 0.35-/spl mu/m five-metal one-poly CMOS process working up to 40 MHz at 3.3 V of power supply, in a fully reconfigurable arrangement of 128 I/O lines. The core area is 32 mm/sup 2/.     

A fingerprint sensor based on the feedback capacitive sensingscheme

This paper introduces a single-chip, 200×200-element sensor array implemented in a standard two-metal digital CMOS technology. The sensor is able to grab the fingerprint pattern without any use of optical and mechanical adaptors. Using this integrated sensor, the fingerprint is captured at a rate of 10 F/s by pressing the finger skin onto the chip surface. The fingerprint pattern is sampled by capacitive sensors that detect the electric field variation induced by the skin surface. Several design issues regarding the capacitive sensing problem are reported and the feedback capacitive sensing scheme (FCS) is introduced. More specifically, the problem of the charge injection in MOS switches has been revisited for charge amplifier design     

Random access analog memory for early vision

An analog frame buffer suitable for early-vision processing is described. It has been fabricated using digital 1.6- mu m CMOS technology. A novel architecture is presented to compensate for the effect of parameter mismatch. The chip stores an image for a time frame of 1/30 s with an equivalent precision of more than 6 b. The array size is 32*32 and the cell dimension is 30.8 mu m*40 mu m. Power consumption is below 30 mW and the chip requires a bias supply of 5 V.<>     

A lab-on-a-chip for cell detection and manipulation

Presents a lab-on-a-chip for electronic manipulation and detection of microorganisms based on the use of closed dielectrophoretic (DEP) cages combined with impedance sensing. A printed circuit board (PCB) prototype has been used to trap, concentrate, and quantify polystyrene micro-beads in agreement with CAD simulations. The experiment was successfully repeated with S. cerevisiae. The results prove the effectiveness of the approach for particle manipulation and detection without the need for external optical components nor chemical labeling. With the proposed approach, particle concentration may be increased on-chip of more than three orders of magnitude, correspondingly boosting the detection sensitivity.     

Identification of viable myocardium by 201Tl scintigraphy: a comparison of methods

The present study was undertaken to compare four different imaging approaches to evaluate uptake defect reversibility. 24 infarcted patients underwent standard stress/redistribution 201Tl imaging (R1). Then, after reinjection of 37 MBq of 201Tl, patients were re-imaged either after 15 min (R2) 24 h later (R3). A separate rest study (R4) following a new tracer injection was done within 2-3 days. Planar images were obtained in the standard three views and subdivided into 216 segments for qualitative analysis based on a visual score. A semiquantitative analysis based upon circumferential profiles was also applied. A stress defect was found in 127 segments (58.7%). By visual inspection reperfusion was considered to occur in 32.3%, 41.7%, 33.0% and 49.6% of the cases with R1, R2, R3, and R4, respectively. The semiquantitative method showed a high reperfusion only with R1 (62%), while the other procedures proved less effective. No improvement was found with R4. Six patients (25%) showed myocardial viability that was not detected with the early reinjection technique.     

A photodiode cell for applications to position and motionestimation sensors

An optical cell has been designed and fabricated using standard digital 1.6 μm CMOS technology. It has been designed for applications to sensors where the image acquisition time of fast moving objects or documents is of primary importance. The cell contains a photodiode working in storage mode and a shielded MOS capacitor acting as analog frame buffer. A chip prototype containing 64 linear arrays of 64 cells whose size is 36×36 μm² has been tested and measurements have proved the functionality down to microsecond-range of exposure times. By virtue of the proposed read-out technique, the sensor architecture provides simultaneous image acquisition of irregular moving objects allowing precise detection of position and motion     

Computing centroids in current-mode technique

A novel current-mode circuit for calculating the centre of mass of a discrete distribution of currents is described. It is simple and compact, an ideal building block for VLSI analogue IC design. The design principles are presented as well as the simulated behaviour of a one-dimensional implementation.<>     

A Low-Power Block-Matching Cell for Video Compression

This paper describes theimplementation of a block-matching modulewith digital I/O. Algorithmic analysisdemonstrates that the precisionrequirements can be met by a compactcircuit that processes the signal in thecharge domain. The required conversionbetween voltages and charges is achieved byMOS capacitors. As a result, it can befabricated by any inexpensive digital CMOStechnology. A test chip has beenimplemented in a standard CMOS 1.6 mtechnology and the measured energyconsumption is 1.2 nJ per block match usingan pixel matrix. Simulations ofthe same cell in 0.35 m and 0.25 mCMOS technology are presented, showing thescalability of the approach.     

A CMOS-only micro touch pointer

A direct-contact finger mouse realized in 0.7-μm digital CMOS is presented. It is based on the motion detection of the fingerprint images acquired with a capacitive sensor. Stroking and tapping the chip surface with the finger causes movement of the cursor and clicking-like mouse. By properly partitioning analog collective computation and digital processing, a power consumption of about 900 μW at 5 V is achieved. The sensor area is 3.8×3.8 mm², and overall chip size is 7.7×6.7 mm²