Isolated hepatic tuberculosis mimicking liver tumors in a dialysis patient

Cases of isolated hepatic tuberculosis (TB) are rare. The diagnosis is often delayed or missed because of nonspecific symptoms and laboratory findings. Besides, the disease is extremely rare even in a country where TB is an alarming public health problem. This report demonstrates the difficulty in correctly diagnosing local hepatic TB. We report the case of a 62‐year‐old male patient with end‐stage renal disease treated with hemodialysis, who developed 2 months of abdominal distension and general anorexia, with hyperechoic hepatic lesions on ultrasound. Computed tomography suspected multiple liver tumors. The liver biopsy finally led to the diagnosis of TB of the liver without other involvements. We conclude that isolated hepatic TB is one of the rare forms of extrapulmonary TB in dialysis patients. A greater awareness of this rare clinical entity may prevent needless surgical interventions.     

Performance and reliability enhancement for CVD tungsten polycidedCMOS transistors due to fluorine incorporation in the gate oxide

The impacts of CVD tungsten polycide (WSi_x) on MOSFET performance and reliability are studied in this letter. The WSi_x process is shown to enhance the S/D lateral extent for both N- and P-channel devices via C_GD and L_eff measurements, confirming previous suspicion. This enhanced S/D extent is found to be easily modulated by drain-to-gate bias, which is favorable for achieving both higher drive currents and higher S/D punch-through voltages than those of non-WSi_x devices. Both electron and hole mobility for the WSi_x device are also slightly higher and closer to the published data compared to the non-WSi_x case. These effects together yield about >5% improvement for nMOSFET and >10% improvement for pMOSFET in drive current at a given punch-through voltage. The channel hot-electron lifetime for the n-channel WSi_x device is about 10 times higher than that of the non-WSi_x one. These enhancements in both performance and reliability make the WSi_x device very attractive fog VLSI CMOS technologies     

4- and 13-GHz tuned amplifiers implemented in a 0.1-μm CMOStechnology on SOI, SOS, and bulk substrates

Four- and 13-GHz tuned amplifiers have been implemented in a partially scaled 0.1-1 μm CMOS technology on bulk, silicon-on-insulator (SOI), and silicon-on-sapphire (SOS) substrates. The 4-GHz bulk, SOI, and SOS amplifiers exhibit forward gains of 14, 11, and 12.5 dB and F_min's of 4.5 (bulk) and 3.5 db (SOS). The 13-GHz SOS and SOI amplifiers exhibit gains of 15 and 5.3 dB and F_unn's of 4.9 and 7.8 dB. The 4-GHz bulk amplifier has the highest resonant frequency among reported bulk CMOS amplifiers, while the 13-GHz SOS and SOI amplifiers are the first in a CMOS technology to have tuned frequencies greater than 10 GHz. These and other measurement results suggest that it may be possible to implement 20-GHz tuned amplifiers in a fully scaled 0.1-1 μm CMOS process     

CMOS scaling into the nanometer regime

Starting with a brief review on 0.1-μm (100 nm) CMOS status, this paper addresses the key challenges in further scaling of CMOS technology into the nanometer (sub-100 nm) regime in light of fundamental physical effects and practical considerations. Among the issues discussed are: lithography, power supply and threshold voltage, short-channel effect, gate oxide, high-field effects, dopant number fluctuations and interconnect delays. The last part of the paper discusses several alternative or unconventional device structures, including silicon-on-insulator (SOI), SiGe MOSFET's, low-temperature CMOS, and double-gate MOSFET's, which may lead to the outermost limits of silicon scaling     

The Role of Visual and Nonvisual Information in the Control of Locomotion.

During locomotion, retinal flow, gaze angle, and vestibular information can contribute to one's perception of self-motion. Their respective roles were investigated during active steering: Retinal flow and gaze angle were biased by altering the visual information during computer-simulated locomotion, and vestibular information was controlled through use of a motorized chair that rotated the participant around his or her vertical axis. Chair rotation was made appropriate for the steering response of the participant or made inappropriate by rotating a proportion of the veridical amount. Large steering errors resulted from selective manipulation of retinal flow and gaze angle, and the pattern of errors provided strong evidence for an additive model of combination. Vestibular information had little or no effect on steering performance, suggesting that vestibular signals are not integrated with visual information for the control of steering at these speeds. (PsycINFO Database Record (c) 2011 APA, all rights reserved)     

Rendering Caustics on Non-Lambertian Surfaces

This paper presents a new technique for rendering caustics on non-Lambertian surfaces. The method is based on an extension of the photon map which removes previous restrictions limiting the usage to Lambertian surfaces. We add information about the incoming direction to the photons and this allows us to combine the photon map with arbitrary reflectance functions. By using a cone-filter we improve the quality of the radiance estimate in particular at discontinuities. Furthermore we introduce balancing of the photon map which not only reduces the memory requirements but also significantly reduces the rendering time. We have used the method to render caustics on surfaces with reflectance functions varying from Lambertian to glossy specular.     

High-performance 0.07-μm CMOS with 9.5-ps gate delay and 150 GHzfT

We report room-temperature 0.07-μm CMOS inverter delays of 13.6 ps at 1.5 V and 9.5 ps at 2.5 V for an SOI substrate; 16 ps at 1.5 V and 12 ps at 2.5 V for a bulk substrate. This is the first room-temperature sub-10 ps inverter ring oscillator delay ever reported. PFETs with very high drive current and reduction in parasitic resistances and capacitances for both NFETs and PFETs, realized by careful thermal budget optimization, contribute to the fast device speed. Moreover, the fast inverter delay was achieved without compromising the device short-channel characteristics. At V_dd=1.5 V and I_off ~2.5 nA/μm, minimum L_eff is about 0.085 μm for NFETs and 0.068 μm for PFETs. PFET I_on is 360 μA/μm, which is the highest value ever reported at comparable V_dd and I_off. The SOI MOSFET has about one order of magnitude higher I_off than a bulk MOSFET due to the floating-body effect. At around 0.07 μm L_eff, the NFET cut-off frequencies are 150 GHz for SOI and 135 GHz for bulk. These performance figures suggest that subtenth-micron CMOS is ready for multi-gigahertz digital circuits, and has good potential for RF and microwave applications     

Rapid simulation of steady-state spatially resolved reflectance and transmittance profiles of multilayered turbid materials

We present a technique for efficiently computing the reflection and transmission of light by arbitrary systems of turbid layers. To approximate the steady-state reflectance and transmittance without the need to solve difficult boundary conditions, we convolve the reflectance and transmittance profiles of individual layers. We extend single-slab boundary conditions to handle index-of-refraction mismatches between turbid slabs and account for interlayer scattering by applying methods similar to Kubelka-Munk theory in frequency space. We demonstrate good agreement between the reflectance and the transmittance predicted by our model and numerical Monte Carlo methods and show that the far-source reflectance and transmittance of multilayered turbid materials are dominated by interlayer scattering.     

GaN epitaxial layers prepared on nano-patterned Si(001) substrate

We report the growth of GaN epitaxial layer on Si(001) substrate with nano-patterns prepared by dry etching facility used in integrated circuit (IC) industry. It was found that the GaN epitaxial layer prepared on nano-patterned Si(001) substrate exhibits both cubic and hexagonal phases. It was also found that threading dislocation observed from GaN prepared on nano-patterned Si(001) substrate was significantly smaller than that prepared on conventional unpatterned Si(111) substrate. Furthermore, it was found that we can reduce the tensile stress in GaN epitaxial layer by about 78% using the nano-patterned Si(001) substrate.     

Relation between velocity and curvature in movement: Equivalence and divergence between a power law and a minimum-jerk model.

Unconstrained hand movements typically display a decrease in hand speed around highly curved sections of a trajectory. It has been suggested that this relation between tangential velocity and radius of curvature conforms to a one-third power law. We demonstrate that a one-third power law can be explained by models taking account of trajectory costs such as a minimum-jerk model. Data were analyzed from 6 subjects performing elliptical drawing movements of varying eccentricities. Conformity to the one-third power law in the average was obtained but is shown to be artifactual. It is demonstrated that asymmetric velocity profiles may result in consistent departures from a one-third power law but that such differences may be masked by inappropriate analysis procedures. We introduce a modification to the original minimum-jerk model by replacing the assumption of a Newtonian point-mass with a visco-elastic body. Simulations with the modified model identify a basis for asymmetry of velocity profiles and thereby predict departures from a one-third law commensurate with the empirical findings. (PsycINFO Database Record (c) 2010 APA, all rights reserved)