Mobile edge computing (MEC) is an emerging technology recognized as an effective solution to guarantee the Quality of Service for computation-intensive and latency-critical traffics. In MEC system, the mobile computing, network control and storage functions are deployed by the servers at the network edges (e.g., base station and access points). One of the key issue in designing the MEC system is how to allocate finite computational resources to multi-users. In contrast with previous works, in this paper we solve this issue by combining the real-time traffic classification and CPU scheduling. Specifically, a support vector machine based multi-class classifier is adopted, the parameter tunning and cross-validation are designed in the first place. Since the traffic of same class has similar delay budget and characteristics (e.g. inter-arrival time, packet length), the CPU scheduler could efficiently scheduling the traffic based on the classification results. In the second place, with the consideration of both traffic delay budget and signal baseband processing cost, a preemptive earliest deadline first (EDF) algorithm is deployed for the CPU scheduling. Furthermore, an admission control algorithm that could get rid off the domino effect of the EDF is also given. The simulation results show that, by our proposed scheduling algorithm, the classification accuracy for specific traffic class could be over 82 percent, meanwhile the throughput is much higher than the existing scheduling algorithms.
The dynamic range of the currently most widely used 24-bit seismic data acquisition devices is 10–20 d B lower than that of broadband seismometers, and this can affect the completeness of seismic waveform recordings under certain conditions. However, this problem is not easy to solve because of the lack of analog to digital converter(ADC) chips with more than 24 bits in the market. In this paper, we propose a method in which an adder, an integrator, a digital to analog converter chip, a field-programmable gate array, and an existing low-resolution ADC chip are used to build a third-order 16-bit oversampling delta-sigma modulator. This modulator is equipped with a digital decimation filter, thus facilitating higher resolution and larger dynamic range seismic data acquisition. Experimental results show that, within the 0.1–40 Hz frequency range, the circuit board's dynamic range reaches 158.2 d B, its resolution reaches 25.99 bits, and its linearity error is below 2.5 ppm, which is better than what is achieved by the commercial 24-bit ADC chips ADS1281 and CS5371. This demonstrates that the proposed method may alleviate or even completely resolve the amplitude-limitation problem that so commonly occurs with broadband observation instruments during strong earthquakes. 相似文献