A dual-loop shunt regulator using current-sensing feedback techniques

The dual-loop shunt regulator using current-sensing feedback techniques is proposed in this paper. This architecture adopts a voltage and current loops to increase the transient response of the proposed shunt regulator. The maximum output current of the proposed shunt regulator is 180 mA at a 1.8 V output. Moreover the architecture of the proposed shunt regulator can suppress the stray effect which is from power supply. The prototype of the proposed shunt regulator is fabricated by the Taiwan Semiconductor Manufacturing Corporation (TSMC) 0.35-μm CMOS 2P4M process. The active area is only 579×355 μm².     

Systematic Generation of Current-Mode Linear Transformation Filters Based on Multiple Output CCIIs

A transformation called current-mode linear transformation (CMLT) and its filter applications using multiple output second-generation current conveyors (MOCCIIs) are presented. The systematic method is developed to realize CMLT MOCCII-based filters efficiently. Based on the proposed design tables, we can synthesize high-order current-mode all-pole and elliptic filters with MOCCIIs, grounded resistors and capacitors. Moreover, the high-frequency elliptic filter can also be efficiently realized by adding capacitors to the relative all-pole filter, although floating capacitors are needed. Third-order Chebychev and elliptic lowpass filters are described in this paper. Experimental results that confirm the theoretical analysis are obtained. Furthermore, the proposed circuits can be extended to higher-order filters.     

VE-mobicast: a variant-egg-based mobicast routing protocol for sensornets

In this paper, we present a new “spatiotemporal multicast”, called a “mobicast”, protocol for supporting applications which require spatiotemporal coordination in sensornets. The spatiotemporal character of a mobicast is to forward a mobicast message to all sensor nodes that will be present at time t in some geographic zone (called the forwarding zone) Z, where both the location and shape of the forwarding zone are a function of time over some interval (t _start ,t _end ). The mobicast is constructed of a series of forwarding zones over different intervals (t _start ,t _end ), and only sensor nodes located in the forwarding zone in the time interval (t _start ,t _end ) should be awake in order to save power and extend the network lifetime. Existing protocols for a spatiotemporal variant of a multicast system were designed to support a forwarding zone that moves at a constant velocity, , in sensornets. To consider the path of a mobile entity which includes turns, this work mainly develops a new mobicast routing protocol, called the variant-egg-based mobicast (VE-mobicast) routing protocol, by utilizing the adaptive variant-egg shape of the forwarding zone to achieve high predictive accuracy. To illustrate the performance achievement, a mathematical analysis is conducted and simulation results are examined. Yuh-Shyan Chen received the M.S. and Ph.D. degrees in Computer Science and Information Engineering from the National Central University, Taiwan, Republic of China, in June 1991 and Jan. 1996, respectively. He joined the faculty of Department of CSIE, Chung-Hua University, Taiwan, in 1996. He joined the Department of Statistic, National Taipei University in Aug. 2000, and joined the Department of CSIE, National Chung Cheng University in Aug. 2002. Dr. Chen is an associate Professor from Aug. 2003. Since 2006, he has been a Professor at the Department of CSIE, National Taipei University, Taiwan. Dr. Chen served as Co-Editors-in-Chief of International Journal of Ad Hoc and Ubiquitous Computing (IJAHUC); Editorial Board Member of Telecommunication System; Guest Editor of Telecommunication Systems, special issue on “Wireless Sensor Networks” (2004). He was a Vice Co-Chair, Wireless IP Symposium of WirelressCOM, USA (2005); Workshop Co-Chair, IEEE AHUC06, Taiwan (2006); Program Co-Chairs, IFIP NCUS06, Korea (2006). Dr. Chen also served as Program Committee Member of ICPP’03, ICDCS’04, ICCCN’01–06, MSN’05, CCN’02–06, CSA’04 06, NCS’06, MSEAT’03–06, WASN06, USN06, MHNET06, PESYS06, ML06, IWWN06, UIC06, ICWMC06, and HWN-RMQ06; IASTED Technical Committee on Telecommunications (2002–2005); WSEAS International Scientific Committee Member (from 2004). His paper wins the 2001 IEEE 15th ICOIN-15 Best Paper Award. Dr. Chen was a recipient of the 2005 Young Scholar Research Award given by National Chung Cheng University to four young faculty members, 2005. His recent research topics include mobile ad-hoc network, wireless sensor network, and 4G system. Dr. Chen is a member of the IEEE Computer Society and Phi Tau Phi Society. Shin-Yi Ann received the B.S. degree in computer science and engineering from the National Taiwan Ocean University, Taiwan, Republic of China, in June 2002 and the M.S. degree in computer science and information engineering from National Chung Cheng University, Taiwan, Republic of China, in July 2004. His research interest includes wireless sensor network. Yun-Wei Lin received the B.S. degree in computer and information science from the Aletheia University, Taiwan, Republic of China, in June 2003 and the M.S. degree in computer science and information engineering from National Chung Cheng University, Taiwan, Republic of China, in July 2005. His research interests include mobile ad hoc network and wireless sensor network.     

A few-shot transfer learning approach using text-label embedding with legal attributes for law article prediction

Applied Intelligence - In this paper, we proposed an intelligent law article prediction method to address the data imbalance and missing value problems in law text analysis. The proposed method...     

Implementation of THD-reduction stereo audio amplifier using compensators and sigma–delta modulators

This paper presents an integrated stereo audio amplifier that employs sigma?Cdelta (????) modulation techniques with compensators. Traditional closed-loop audio amplifiers adopt pulse-width modulation or ???? modulation techniques. The design method proposed in this study uses a negative feedback closed-loop system with compensator and ???? modulator. This combination of compensator and ???? modulator significantly reduces the noise and total harmonic distortion (THD) compared with a traditional closed-loop system. The proposed negative feedback loop can automatically compensate for external perturbations, improving the precision of the eventual output. The compensator increases the audio-frequency loop gain, and leads to better rejection of audio-frequency disturbances. At a sample rate of 10?MHz, the proposed audio amplifier achieves 0.04% THD and a signal to noise ratio of 87?dB with efficiency above 92%. The proposed audio amplifier was implemented in a TSMC 3.3?V 0.35???m 2P4M CMOS process.     

Performance comparison of integrated fully-differential filterless class-D amplifiers with different feedback techniques

Two integrated stereo fully differential filterless class-D amplifiers are presented in this paper. The object is to develop a modulation of a class-D audio amplifier with high power efficiency in this paper. The traditional H-bridge class-D audio amplifier has a shortcoming of large signal distortion which is worse than realized. However, the proposed circuit improves the drawback and provides high power efficiency at the same time. The circuit implements a modified scheme of pulse-width modulation. In this paper, we presented two class-D amplifiers, compared their differences and explained why the efficiency and distortion performance can be modified. The increase in total harmonic distortion (THD) is due to non-linearity in the triangle wave. To overcome this problem, a negative feedback from the output of the switching power stage is adopted to reduce the THD. When a 0.7-V_PP and 1 kHz sine wave is used as an input signal, the minimum THD is 0.029 % and the maximum power efficiency is 83 %. The fully differential class-D audio amplifier is implemented with a TSMC 0.35-μm 2P4M CMOS process, and the chip area is 2.57 × 2.57 mm² (with PADs).     

SFFS–SVM based prostate carcinoma diagnosis in DCE-MRI via ACM segmentation

The prostate carcinoma is amongst the most commonly occurring cancers in Taiwanese males. Moreover, it is one of the chief reasons for cancer deaths among Taiwanese men, and early diagnosis of prostate cancer is vital for effective treatment. In this work, a diagnosis model for identifying the prostate carcinoma in dynamic contrast-enhanced magnetic resonance imaging (DCE-MRI) is proposed. The urologists utilize the DCE-MRI as a support mechanism for better diagnosis of the carcinoma development in the prostate. Gadolinium is utilized as the contrast agent for the DCE-MRI data, and it was injected once and the time series data were captured at distinct time intervals of 0, 20, 60, and 100 s correspondingly. Primarily, after pre-processing the DCE-MRI information, the prostate data is segmented by employing the active contour model. Subsequently, 136 features are extracted from the segmented prostrate expanse of the DCE-MRI data, and the relative intensity change curve is computed. Afterward, Fisher’s discriminant ratio and sequential forward floating selection is deployed for choosing ten highly discriminative features. Lastly, the segmented prostate regions are classified into two groups, namely: tumor and normal classes by employing the support vector machine classifier. The experimental results elucidate that the proposed system is superior on the subject of accuracy, sensitivity, and specificity when compared with specific existing methods. Additionally, the proposed system also demonstrates a 94.75% accuracy. Moreover, this signifies the fact that the proposed method for analyzing the DCE data has shown prodigious prospects in the prostate carcinoma diagnosis.

     

A rail-to-rail ultra-wide bandwidth hybrid supply modulator for 5G applications with envelope tracking techniques

A rail-to-rail ultra-wide bandwidth hybrid supply modulator for 5G applications is presented in this paper. The proposed supply modulator has 600-MHz bandwidth, which is the widest available bandwidth today. The hybrid supply modulator uses envelope tracking (ET) technique to achieve optimal efficiency. This circuit achieves high efficiency with wide bandwidth by combining the linear amplifier (LA) and the switching converter. The optimal size of the LA output stage provides a good tracking ability. The proposed hysteresis window circuit uses the simplified number of MOSFET that reduces the chip area and increases the efficiency of the overall system. This chip has been fabricated in TSMC 90-nm CMOS processes, and the maximum tracking ability can reach to 600-MHz sine wave. The output voltage range of the sine wave is from 0.19 to 0.79 V. The maximum load current is 122 mA. The proposed supply modulator is suitable for 5G applications. The chip area is 0.87 mm × 0.87 mm.