a-Si:H/a-SiGe:H/a-SiGe:H叠层结构太阳能电池性能的数值模拟

本文采用AMPS-1D(Analysis of Microelectronic and Photonic Structures)模拟软件在AM1.5G (100 mW/cm2) 的辐射及室温条件下模拟了a-Si:H/a-SiGe:H/a-SiGe:H三叠层太阳能电池的各项性能。本文首先对三个子电池进行模拟,设定构成叠层电池的三个子电池的带隙分别为1.8、1.6和1.4 eV。计算结果表明：缺陷态是影响电池开路电压及填充因子的重要因素。在对三叠层太阳能电池的数值模拟过程中采用两步匹配法进行电流匹配,并对隧穿结进行优化设计。模拟结果表明：叠层电池的开路电压、填充因子和转换效率在优化隧穿结后都得到提高,且S型的J-V曲线消失。同时本文还对叠层太阳能电池的能带图和载流子复合图进行分析,并将本模拟结果与实验数据相比较,可以得出模拟结果与实验数据符合的较好。     

SiGe∶H薄膜太阳能电池研究进展

针对氢化非晶硅(a-Si∶H)薄膜太阳能电池在发展过程中所面临的问题,阐述了氢化硅锗(SiGe∶H)薄膜在太阳能电池制备方面的优越性及其最新研究进展,总结了提高SiGe∶H薄膜太阳能电池效率的几种方法,着重介绍了叠层太阳能电池内部运行机理,分析了影响叠层太阳能电池转换效率的因素,最后对SiGe∶H薄膜材料在太阳能电池领域的应用前景以及一些亟待解决的问题进行了展望。     

Numerical simulation of the performance of the a-Si：H/a-SiGe：H/a-SiGe：H tandem solar cell

The computer program AMPS-1D（analysis of microelectronic and photonic structures） has been employed to simulate the performance of the a-Si：H/a-SiGe：H/a-SiGe：H triple-junction solar cell at the radiation of AM1.5G（100 mW/cm2/ and room temperature. Firstly, three sub-cells with band gaps of 1.8, 1.6 and 1.4 eV are simulated, respectively. The simulation results indicate that the density of defect states is an important factor, which affects the open circuit voltage and the filling factor of the solar cell. The two-step current matching method and the control variate method are employed in the simulation. The results show that the best solar cell performance would be achieved when the intrinsic layer thickness from top to bottom is set to be 70, 180 and 220 nm, respectively. We also optimize the tunnel-junction structure of the solar cell reasonably, the simulation results show that the open circuit voltage, filling factor and conversion efficiency are all improved and the S-shape current density–voltage curve disappears during optimizing the tunnel-junction structure. Besides, the diagram of the energy band and the carrier recombination rate are also analyzed. Finally, our simulation data are compared to the experimental data published in other literature. It is demonstrated that the numerical results agree with the experimental ones very well.     

Ge/Si异质键合界面纳米级氧化层对Ge/Si异质结光电特性调控机制

由于Ge/Si存在4.2%晶格失配,Si基外延Ge中的穿透位错密度(TDD)极高,导致器件暗电流偏大。低温Ge/Si异质键合可以通过抑制失配位错传播降低Ge薄膜中的TDD,在高质量大失配薄膜制备方面展现出巨大的潜力。然而,Ge/Si键合界面由于亲水反应形成的纳米级氧化层会对异质结性能产生影响。基于载流子基本方程,在键合界面构建载流子非局域量子隧穿模型,通过半经典近似解法研究Ge/Si异质键合界面氧化层厚度(dO)对异质结暗电流、总电流、光谱响应、带宽等性能的影响,并揭示异质结性能影响机制。研究表明:随着dO的增加,氧化层对载流子的阻挡效应增强,导致器件暗电流、总电流和光谱响应下降。由于氧化层的分压效应,dO的增加导致Ge层中电场下降,载流子速率降低,进而导致异质结高频特性变差。为确保键合Ge/Si异质结优异的光电特性,dO必须控制在0.50 nm以内。