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Abstract Multi-core digital signal processors (DSPs) are widely used in wireless telecommunication, core network transcoding, industrial control, and audio/video processing technologies, among others. In comparison with general-purpose multi-processors, multi-core DSPs normally have a more complex memory hierarchy, such as on-chip core-local memory and non-cache-coherent shared memory. As a result, efficient multi-core DSP applications are very difficult to write. The current approach used to program multi-core DSPs is based on proprietary vendor software development kits (SDKs), which only provide low-level, non-portable primitives. While it is acceptable to write coarse-grained task-level parallel code with these SDKs, writing fine-grained data parallel code with SDKs is a very tedious and error-prone approach. We believe that it is desirable to possess a high-level and portable parallel programming model for multi-core DSPs. In this paper, we propose OpenMDSP, an extension of OpenMP designed for multi-core DSPs. The goal of OpenMDSP is to fill the gap between the OpenMP memory model and the memory hierarchy of multi-core DSPs. We propose three classes of directives in OpenMDSP, including 1) data placement directives that allow programmers to control the placement of global variables conveniently, 2) distributed array directives that divide a whole array into sections and promote the sections into core-local memory to improve performance, and 3) stream access directives that promote big arrays into core-local memory section by section during parallel loop processing while hiding the latency of data movement by the direct memory access (DMA) of a DSP. We implement the compiler and runtime system for OpenMDSP on PreeScale MSC8156. The benchmarking results show that seven of nine benchmarks achieve a speedup of more than a factor of 5 when using six threads. 相似文献
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一种支持多重循环软件流水的寄存器结构 总被引:1,自引:0,他引:1
寄存器结构及其分配是软件流水算法的关键之一.为支持多重循环的软件流水,该文提出一种新颖的寄存器结构:半共享跳跃式流水寄存器堆.它可以有效地解决多重循环软件流水下的特殊问题,即:同层次和跨层次的寄存器重命名问题以及断流问题;有效地消除外层循环的体间读写相关,提高程序的指令级并行度.它有3种分配方式可供灵活使用:单个寄存器、流水寄存器和寄存器组方式.流水寄存器方式对生存期确定的、局限于一个循环层次的寄存器重命名问题提供简单而有效的支持.寄存器组分配方式解决了多重循环软件流水时变量生存期不确定的情况.跳跃操作为 相似文献
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VHDL语言设计可综合的微处理器内核* 总被引:3,自引:0,他引:3
详细介绍了用VHDL语言设计可逻辑综合的教学实验用CPU的过程。CPU指令系统构架采用RISC结构,设计上使用结构化编程方法,将CPU内核按照功能划分为不同的模块,采用VHDL语言设计每一个模块的内部功能和外围接口。所有的功能模块组合起来后,通过EDA工具进行CPU内核的逻辑综合和功能仿真,最后在可编程逻辑器件上实现这个完整的CPU内核。 相似文献
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提出了一套全新的微机接口实验仪。该实验仪利用PCI主模式控制芯片Plx9054在PCI总线上扩展出一个8位教学用微机实验总线(E-Bus),并在该总线上设计了一个EDA的开发平台和一套软件开发包。学生即可以利用该E-DA平台和软件开发包在E-Bus上设计各种PC机接口。该文首先描述了E-BUS的扩展方法和EDA开发平台的组成原理,然后给出了一个键盘接口的例子对实验步骤做了详细描述,最后与国内同类产品进行了比较。 相似文献
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本文提出了一个新型的能够高效率地支持带有分支的循环运行的MIMD体系结构。这一体系结构在软件流水技术的支持下,能够灵活地处理循环中的分支对循环并行执行所产生的不利影响。从而在运行循环时,在时间效益及空间效益上都达到极优。本文在介绍体系结构之后,还将介绍其优化编译器的初步构造。 相似文献
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一种运行时消除指针别名歧义的新方法 总被引:1,自引:1,他引:0
提出一种采用软硬件结合的运行时消除指针别名歧义的新方法SHRTD(software/hardware run-time disambiguation).为延迟运行时不正确的内存访问及其后继操作,SHRTD的功能单元执行NOP操作.为保证所有延迟操作执行顺序的一致性,编译时就确定执行NOP操作的所有功能单元的顺序和NOP操作的数目.SHRTD方法适用于不可逆代码,同时它的代码空间受限,也不存在严重的代码可重入性问题.新方法有效地解决了指针别名问题,为获得潜在的指令级并行加速提供了可能. 相似文献
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