Pilot: probabilistic lightweight group communication system for ad hoc networks

Providing reliable group communication is an ever recurring topic in distributed settings. In mobile ad hoc networks, this problem is even more significant since all nodes act as peers, while it becomes more challenging due to highly dynamic and unpredictable topology changes. In order to overcome these difficulties, we deviate from the conventional point of view, i.e., we "fight fire with fire," by exploiting the nondeterministic nature of ad hoc networks. Inspired by the principles of gossip mechanisms and probabilistic quorum systems, we present in this paper PILOT (probabilistic lightweight group communication system) for ad hoc networks, a two-layer system consisting of a set of protocols for reliable multicasting and data sharing in mobile ad hoc networks. The performance of PILOT is predictable and controllable in terms of both reliability (fault tolerance) and efficiency (overhead). We present an analysis of PILOT's performance, which is used to fine-tune protocol parameters to obtain the desired trade off between reliability and efficiency. We confirm the predictability and tunability of PILOT through simulations with ns-2.     

Self-organized public-key management for mobile ad hoc networks

In contrast with conventional networks, mobile ad hoc networks usually do not provide online access to trusted authorities or to centralized servers, and they exhibit frequent partitioning due to link and node failures and to node mobility. For these reasons, traditional security solutions that require online trusted authorities or certificate repositories are not well-suited for securing ad hoc networks. We propose a fully self-organized public-key management system that allows users to generate their public-private key pairs, to issue certificates, and to perform authentication regardless of the network partitions and without any centralized services. Furthermore, our approach does not require any trusted authority, not even in the system initialization phase.     

Influence of device engineering on the analog and RF performances of SOI MOSFETs

This work presents a systematic comparative study of the influence of various process options on the analog and RF properties of fully depleted (FD) silicon-on-insulator (SOI), partially depleted (PD) SOI, and bulk MOSFET's with gate lengths down to 0.08 /spl mu/m. We introduce the transconductance-over-drain current ratio and Early voltage as key figures of merits for the analog MOS performance and the gain and the transition and maximum frequencies for RF performances and link them to device engineering. Specifically, we investigate the effects of HALO implantation in FD, PD, and bulk devices, of film thickness in FD, of substrate doping in SOI, and of nonstandard channel engineering (i.e., asymmetric Graded-channel MOSFETs and gate-body contacted DTMOS).     

Nash equilibria of packet forwarding strategies in wireless ad hoc networks

In self-organizing ad hoc networks, all the networking functions rely on the contribution of the participants. As a basic example, nodes have to forward packets for each other in order to enable multihop communication. In recent years, incentive mechanisms have been proposed to give nodes incentive to cooperate, especially in packet forwarding. However, the need for these mechanisms was not formally justified. In this paper, we address the problem of whether cooperation can exist without incentive mechanisms. We propose a model,based on game theory and graph theory to investigate equilibrium conditions of packet forwarding strategies. We prove theorems about the equilibrium conditions for both cooperative and noncooperative strategies. We perform simulations to estimate the probability that the conditions for a cooperative equilibrium hold in randomly generated network scenarios.. As the problem is involved, we deliberately restrict ourselves to a static configuration. We conclude that in static ad hoc networks where the relationships between the nodes are likely to be stab le-cooperation needs to be encouraged.     

Drift hole mobility in strained and unstrained doped Si1-xGex alloys

Results of the drift hole mobility in strained and unstrained SiGe alloys are reported for Ge fractions varying from 0 to 30% and doping levels of 10¹⁵-10¹⁹ cm^-3. The mobilities are calculated taking into account acoustic, optical, alloy, and ionized-impurity scattering. The mobilities are then compared with experimental results for a boron doping concentration of 2×10¹⁹ cm^-3. Good agreement between experimental and theoretical values is obtained. The results show an increase in the mobility relative to that of silicon     

A high-speed gateable image pipeline

We present the performance of a high-speed gateable vacuum image pipeline, which permits individual images to be delayed and selected from continuous non-repetitive image stream. This device is composed of a vacuum tube equipped with a photocathode at one end, a phosphor screen at the other end, and a system of metal grids in between. Photoelectrons produced by the images focused on the photocathode, are guided by a uniform magnetic field, parallel to the tube axis. By changing the grid potentials, the drift time of the photoelectrons inside the tube can be varied from 0.35 to 1.5 μs. An image can then be selected by an external trigger with a time resolution in the range of 4–30 ns, depending on the delay time. The selected photoelectrons are finally accelerated onto the phosphor screen, set at 10 kV, where they reproduce the desired image. With a magnetic field of 0.1 T, a spatial resolution of 33 lp/mm was obtained. The high spatial and time resolution make this device an interesting tool for high-energy physics and astrophysics experiments, and for high-speed photography.     

Multiple-gate SOI MOSFETs: device design guidelines

This paper describes computer simulations of various SOI MOSFETs with double and triple-gate structures, as well as gate-all-around devices. The concept of a triple-gate device with sidewalls extending into the buried oxide (hereby called a "/spl Pi/-gate" or "Pi-gate" MOSFET) is introduced. The Pi-gate device is simple to manufacture and offers electrical characteristics similar to the much harder to fabricate gate-all-around MOSFET. To explore the optimum design space for four different gate structures, simulations were performed with four variable device parameters: gate length, channel width, doping concentration, and silicon film thickness. The efficiency of the different gate structures is shown to be dependent of these parameters. The simulation results indicate that the the Pi-gate device is a very promising candidate for future nanometer MOSFET applications.     

EIS evaluation of the filiform corrosion of aluminium coated by a cataphoretic paint

Filiform corrosion is mainly considered as a cosmetic attack and is undesirable in most applications. The initiation and propagation of the filaments are related to different parameters such as the presence of defects, the permeability of the coating to water and oxygen, the adherence of the paint system and the presence of salts.

The aim of this work is to study the behaviour of painted aluminium samples towards filiform corrosion or delamination. The 6082 Aluminium alloy was selected and the samples were covered with a cataphoretic epoxy primer without lead (PPG Industries France). Prior to the application of the electrocoat, the samples were pre-treated by a commercial Zr/Ti or chromate conversion treatment or simply etched with a commercial acid etching product.

Filiform corrosion was studied by the normalized test (ISO/DIS 4623): painted and scratched samples were inoculated in HCl and exposed in a constant humidity chamber at 40 °C and 82% RH for 3 weeks. After exposure the samples were subjected to a visual and optical microscopic examination.

Electrochemical impedance spectroscopy was used to study the sensitivity to filiform corrosion. The operating mode of this test is similar to the normalized one. The samples were scratched before inoculation for 1 h in HCl and then exposed to the humidity chamber for a maximum of 4 days. The samples were tested by EIS in an acidified 0.1 M Na₂SO₄ electrolyte solution. The resulting impedance spectra were analyzed with an appropriate equivalent electrical circuit which allows the evaluation of the exposed metallic surface area, directly related to the extent of filiform corrosion or delamination. Different parameters were varied: the exposure time in the humidity chamber; the immersion time in the electrolyte sulphate solution as well as its pH and the coating thickness.