A novel InP/InGaAs tunneling emitter bipolar transistor (TEBT) is fabricated and demonstrated. The studied device exhibits a very small collector-emitter offset voltage of 40 mV and an extremely wide operation regime. The operation region is larger than 11 decades in magnitude of collector current (10/sup -12/ to 10/sup -1/A). A current gain of 3 is obtained even if the device is operated at an ultralow collector current of 3.9 /spl times/ 10/sup -12/A (1.56 /spl times/ 10/sup -7/A/cm/sup 2/). Furthermore, the common-emitter breakdown voltage of the studied device is higher than 2 V. Consequently, the studied device shows a promise for low supply voltage, and low-power consumption circuit applications. 相似文献
Based on Lee-Lu-Lee's array multipliers and the RESO method, a concurrent error detection scheme in array multipliers for GF(2m ) fields is presented and only one clock cycle is added. The fault tolerant capability in such array multipliers is also included and only two extra clock cycles are required 相似文献
Polycylic aromatic hydrocarbons (PAHs) are listed as carcinogenic and mutagenic priority pollutants, belonging to the environmental endocrine disrupters. Most PAHs in the environment stem from the atmospheric deposition and diesel emission. Consequently, the elimination of PAHs in the off-gases is one of the priority and emerging challenges. Catalytic oxidation has been widely used in the destruction of organic compounds due to its high efficiency (or conversion of reactants), its economic benefits and good applicability.
This study investigates the application of the catalytic oxidation using Pt/γ-Al2O3 catalysts to decompose PAHs and taking naphthalene (the simplest and least toxic PAH) as a target compound. It studies the relationships between conversion, operating parameters and relevant factors such as treatment temperatures, catalyst sizes and space velocities. Also, a related reaction kinetic expression is proposed to provide a simplified expression of the relevant kinetic parameters.
The results indicate that the Pt/γ-Al2O3 catalyst used accelerates the reaction rate of the decomposition of naphthalene and decreases the reaction temperature. A high conversion (over 95%) can be achieved at a moderate reaction temperature of 480 K and space velocity below 35,000 h−1. Non-catalytic (thermal) oxidation achieves the same conversion at a temperature beyond 1000 K. The results also indicate that Rideal–Eley mechanism and Arrhenius equation can be reasonably applied to describe the data by using the pseudo-first-order reaction kinetic equation with activation energy of 149.97 kJ/mol and frequency factor equal to 3.26 × 1017 s−1. 相似文献
As IC devices scale down to the submicron level, the resistance-capacitance (RC) time delays are the limitation to circuit
speed. A solution is to use low dielectric constant materials and low resistivity materials. In this work, the influence of
underlying barrier Ta on the electromigration (EM) of Cu on hydrogen silsesquioxane (HSQ) and SiO2 substrates was investigated. The presence of a Ta barrier not only improves the adhesion between Cu and dielectrics, but
also enhances the crystallinity of Cu film and improves the Cu electromigration resistance. The activation energy obtained
suggests a grain boundary migration mechanism and the current exponent calculated indicates the Joule heating effect. 相似文献
A Montgomery's algorithm in GF(2m) based on the Hankel matrix-vector representation is proposed. The hardware architecture obtained from this algorithm indicates low-complexity bit-parallel systolic multipliers with irreducible trinomials. The results reveal that the proposed multiplier saves approximately 36% of space complexity as compared to an existing systolic Montgomery multiplier for trinomials. A scalable and systolic Montgomery multiplier is also developed by applying the block-Hankel matrix-vector representation. The proposed scalable systolic architecture is demonstrated to have significantly less time-area product complexity than existing digit-serial systolic architectures. Furthermore, the proposed architectures have regularity, modularity and local interconnectability, making the.m highly appropriate for VLSI implementation. 相似文献
Today, with the increasing popularity of multicore processors, one approach to optimizing the processor's performance is to reduce the execution times of individual applications running on each core by designing and implementing more powerful cores. Another approach, which is the polar opposite of the first, optimizes the processor's performance by running a larger number of applications on a correspondingly larger number of cores, albeit simpler ones. The difference between these two approaches is that the former focuses on reducing the latency of individual applications or threads (it optimizes the processor's single-threaded performance), whereas the latter focuses on reducing the latency of the applications' threads taken as a group (it optimizes the processor's multithreaded performance). The panel, from the 2007 Workshop on Computer Architecture Research Directions, discusses the relevant issues. 相似文献
Designs of broadband dual-polarized patch antennas fed by promising feed structures of a capacitively coupled feed and a slot-coupled feed (antenna A), two capacitively coupled feeds of a 180° phase shift and a slot-coupled feed (antenna B), and two capacitively coupled feeds of a 180° phase shift and two slot-coupled feeds (antenna C) are proposed and experimentally studied. The first two feed designs are for the excitation of a single-element broadband patch antenna, while the last design is for a two-element broadband patch antenna. These proposed patch antennas have a thick air substrate, and the 10 dB return-loss impedance bandwidths obtained for the two polarizations are all greater than 13%. High isolation (<-30 dB for antenna A, <-32 dB for antenna B, <-35 dB for antenna C) between the two feeding ports for the entire impedance bandwidth of the proposed antennas can be obtained. Also, improved cross-polarization levels (>20 dB) in both E and H plane patterns for the two polarizations of antennas B and C are achieved 相似文献