Randomized scheduling algorithms for high-aggregate bandwidth switches

The aggregate bandwidth of a switch is its port count multiplied by its operating line rate. We consider switches with high-aggregate bandwidths; for example, a 30-port switch operating at 40 Gb/s or a 1000-port switch operating at 1 Gb/s. Designing high-performance schedulers for such switches with input queues is a challenging problem for the following reasons: (1) high performance requires finding good matchings; (2) good matchings take time to find; and (3) in high-aggregate bandwidth switches there is either too little time (due to high line rates) or there is too much work to do (due to a high port count). We exploit the following features of the switching problem to devise simple-to-implement, high-performance schedulers for high-aggregate bandwidth switches: (1) the state of the switch (carried in the lengths of its queues) changes slowly with time, implying that heavy matchings will likely stay heavy over a period of time and (2) observing arriving packets will convey useful information about the state of the switch. The above features are exploited using hardware parallelism and randomization to yield three scheduling algorithms - APSARA, LAURA, and SERENA. These algorithms are shown to achieve 100% throughput and simulations show that their delay performance is quite close to that of the maximum weight matching, even when the traffic is correlated. We also consider the stability property of these algorithms under generic admissible traffic using the fluid-model technique. The main contribution of this paper is a suite of simple to implement, high-performance scheduling algorithms for input-queued switches. We exploit a novel operation, called MERGE, which combines the edges of two matchings to produce a heavier match, and study of the properties of this operation via simulations and theory. The stability proof of the randomized algorithms we present involves a derandomization procedure and uses methods which may have wider applicability.     

Electrical characterization of carbon nanotube Y-junctions: a foundation for new nanoelectronics

A review on the syntheses and electrical characterization of Y-shaped multi-walled carbon nanotube morphologies is presented. Modified thermal CVD processes, using Ti precursors, are used to grow Y-junctions of different geometries and distribution of catalyst particles. It has been established that novel electrical switching behavior is feasible, where any one of the three branches of the Y-junction can be used for modulating the electrical current flow through the other two branches. Current blocking behavior, leading to perfect rectification, is seen which could be related to the interplay of the carrier lifetime and the transit time. The overall goal is to investigate the possibility of obtaining novel functionality at the nanoscale, which can lead to new device paradigms.     

Presentation and treatment of spontaneous aortocaval fistula

BACKGROUND: Spontaneous rupture of abdominal aortic aneurysm into the inferior vena cava is rare. The clinical presentation is highly variable, and the diagnosis can be difficult, often being made only at operation. The aortocaval fistula results in a large left-to-right shunt, which can cause cardiac failure. Once the diagnosis is made, treatment is by surgical closure of the fistula and repair of the aneurysm with a graft. METHODS: This is a retrospective review of a single surgeon's experience with aortocaval fistula complicating abdominal aortic aneurysms. RESULTS: Over a 15-year period, we had five patients with spontaneous aortocaval fistula who were treated operatively. Preoperative diagnosis was made in two, suspected in one, and not made in two, one of whom died (the only perioperative death in the series). CONCLUSIONS: Spontaneous aortocaval fistulas are uncommon, and their preoperative recognition is difficult. Hematuria in association with an abdominal aortic aneurysm should raise the suspicion of an aortocaval fistula. Surgical correction is possible, with survival rates comparable to those associated with rupture of aneurysms into the retroperitoneum. Early operative control of the fistula is important to optimize the preload to the heart.     

A 4.5-GHz 130-nm 32-KB L0 cache with a leakage-tolerant self reverse-bias bitline scheme

This paper describes a 32-KB two-read, one-write ported L0 cache for 4.5-GHz operation in 1.2-V 130-nm dual-V/sub TH/ CMOS technology. The local bitline uses a leakage-tolerant self reverse-bias (SRB) scheme with nMOS source-follower pullup access transistors, while preserving robust full-swing operation. Gate-source underdrive of -220 mV on the bitline read-select transistors is established without external bias voltages or gate-oxide overstress. Device-level measurements in the 130-nm technology show 72/spl times/ bitline active leakage reduction, enabling low-V/sub TH/ usage, 40% bitline keeper downsizing, and 16 bitcells/bitline. 11% faster read delay and 2/spl times/ higher dc noise robustness are achieved compared with high-performance dual-V/sub TH/ bitline scheme. Sustained performance and robustness benefits of the SRB technique against conventional dynamic bitline with scaling to 100- and 70-nm technology is also presented.     

Finite element crack growth algorithm for dynamic fracture

A new finite element crack growth algorithm has been developed to simulate dynamic fracture. In this algorithm, pseudo elements with very high initial density are placed below the crack plane and the density is reduced to zero in a gradual manner as the crack passes the element. A number of linear elastic and elasto-viscoplastic problems have been carried out to test the new algorithm. The results are compared with some of the existing crack growth models.     

Activation energy determination from low-temperature CV dispersion[semiconductor devices]

The response of semiconductor devices at low temperatures to changes in the voltage across the depletion region is limited by the dielectric relaxation time of the majority carriers in the bulk region. This results in a dispersion of the C-V curves at low temperatures. In this paper, we report a study of the dispersion seen in the accumulation and depletion regions of the C-V curve in n- and p-channel MOS transistors as well as in reverse biased one-sided abrupt junctions. From the admittance measured as a function of temperature and frequency, the dopant energy level is determined. The values of the activation energy measured using the diodes agree well with the corresponding values obtained using MOS devices     

Entropy and the timing capacity of discrete queues

Queueing systems which map Poisson input processes to Poisson output processes have been well-studied in classical queueing theory. This paper considers two discrete-time queues whose analogs in continuous-time possess the Poisson-in-Poisson-out property. It is shown that when packets arriving according to an arbitrary ergodic stationary arrival process are passed through these queueing systems, the corresponding departure process has an entropy rate no less (some times strictly more) than the entropy rate of the arrival process. Some useful by-products are discrete-time versions of: (i) a proof of the celebrated Burke's (1956) theorem, (ii) a proof of the uniqueness, amongst renewal inputs, of the Poisson process as a fixed point for exponential server queues proposed by Anantharam (1993), and (iii) connections with the timing capacity of queues described by Anantharam and Verdu (1996).     

Theoretical Investigation of Metal Cladding for Nanowire and Cylindrical Micropost Lasers

We investigate the transverse modal properties of cylindrical subwavelength metal-clad nanowire and micropost lasers via rigorous theoretical waveguide analysis, including the effects of finite thickness metal cladding and gain in the core. The results of this analysis show that air-metal surface guided TM₀₁ and some hybrid surface guided modes suffer less loss but are less confined to the core, while core-metal surface guided modes are better confined to the core but suffer greater loss. An increase in the thickness of the metal cladding reduces the loss of the core-metal surface guided modes. The modal gain and confinement of the metal-clad cavity are compared to an unclad cavity.