Experiments utilizing FeO4 for purifying water

The reduction of the metal ion content of river and well water by chemical treatment with Na₂FeO₄ has been studied.Pb(II), Cu(II), Zn(II) Fe(III), Hg(II), Cd(II) and Cr(III) are reduced to low levels by the addition of Na₂FeO₄ and its subsequent decomposition to a Fe(OH)₃ gel. The odors (presumably due to sulfur compounds) are completely removed, the bacterial action greatly reduced and the sedimentation rate significantly increased by this reagent.     

Experiments utilizing FeO42− for purifying water

The reduction of the metal ion content of river and well water by chemical treatment with Na₂FeO₄ has been studied.Pb(II), Cu(II), Zn(II) Fe(III), Hg(II), Cd(II) and Cr(III) are reduced to low levels by the addition of Na₂FeO₄ and its subsequent decomposition to a Fe(OH)₃ gel. The odors (presumably due to sulfur compounds) are completely removed, the bacterial action greatly reduced and the sedimentation rate significantly increased by this reagent.     

Edge and core Thomson scattering systems and their calibration on the ASDEX Upgrade tokamak

A new 10 channel Thomson scattering (TS) system was installed on the ASDEX Upgrade tokamak to measure radial profiles of electron density and temperature at the plasma edge with high radial resolution. Together with the already existing TS system, which is now used for the core plasma, electron density and temperature profiles extending from the edge to the core are now obtained in a single discharge. The TS systems are relatively calibrated by an optical parametric oscillator.     

A 12-Bit 75-MS/s Pipelined ADC Using Incomplete Settling

The residue amplifiers in high-speed pipelined analog-to-digital converters (ADCs) typically determine the converter's overall speed and power performance. We propose a mixed-signal technique that exploits incomplete settling to achieve low power residue amplification. In the first stage of a 12-bit, 75-MS/s proof-of-concept prototype, the employed open-loop residue amplifier dissipates only 2.9 mW from a 3-V supply, achieving >60% amplifier power reduction over a previously reported open-loop residue amplifier implementation and achieving >90% amplifier power reduction over a conventional opamp implementation. Test results show that the converter's maximum signal-to-noise-and-distortion ratio (SNDR) is 65.6 dB. The measured integral and differential nonlinearity are 0.95 LSB and 0.64 LSB, respectively. The experimental chip occupies 7.9 mm² and consumes 273 mW in a 0.35-mum double-poly, quadruple-metal CMOS process     

System embedded ADC calibration for OFDM receivers

This paper describes a background calibration technique for analog-to-digital converters (ADCs) that exploits communication protocol redundancy to measure and correct for analog circuit imperfections. In particular, we consider the implementation of a 6-bit, 500-MS/s ADC in the receiver of an ultra wideband system using orthogonal frequency division multiplexing (OFDM). The calibration is intended for a time-interleaved array of successive approximation register ADCs and cancels converter nonlinearity due to inter-channel offset mismatches. The individual channel offsets are estimated through statistical correlation, based on known pseudorandom modulation sequences used in OFDM pilot tones. Our simulation results show that the proposed calibration is capable of improving the signal-to-noise and distortion ratio from 20 to 37 dB with a tracking time constant of 85 ms, assuming an additive white Gaussian noise channel with 20-dB signal-to-noise ratio.     

Controlling electric dipoles in nanodielectrics and its applications for enabling air-stable n-channel organic transistors

We present a new method to manipulate the channel charge density of field-effect transistors using dipole-generating self-assembled monolayers (SAMs) with different anchor groups. Our approach maintains an ideal interface between the dipole layers and the semiconductor while changing the built-in electric potential by 0.41-0.50 V. This potential difference can be used to change effectively the electrical properties of nanoelectronic devices. We further demonstrate the application of the SAM dipoles to enable air-stable operation of n-channel organic transistors.     

Alternative Paths to Competitive Advantage: A Fuzzy-Set Analysis of the Origins of Large Firms

Scholars have documented the importance of national-level factors for the competitive success of firms on a global scale. These studies typically identify multiple factors that are behind the emergence of large and successful firms in particular national clusters. However, there has been relatively little research identifying whether such factors are all collectively necessary to produce the outcome, or whether only a few of the factors in different combinations might be sufficient to generate the shift in competitive advantage manifested in the market power of large “flagship” firms. In this paper, we study the evolution of one industry across six countries in which the competitive position of national firms changed considerably during our 100-year analysis period. The results of our combined historical and fuzzy-set analyses show that an unequal distribution of resources may lead to alternative causal pathways to competitive advantage of the largest firms.     

Eliminating complex conjugate poles in two-stage operational amplifiers with current buffer Miller compensation

This paper describes conditions and simple circuit modifications that eliminate undesired complex conjugate poles in two-stage operational amplifiers that are based on current buffer Miller compensation. The complex conjugate poles have been the main problem of this frequency compensation topology since its first introduction more than 30 years ago. It is shown that a resistor added between the second stage and the amplifier output creates a zero that improves stability and reduces the circuit to a second-order system. This greatly simplifies the design of an otherwise complex topology and at the same time retains the valued benefits of current buffer based frequency compensation. In addition, for the case where a short channel transistor is used for the current buffer, conditions that create sufficient phase margin for the inner loop of the amplifier without the nulling resistor are formulated.     

A 12-bit 75-MS/s pipelined ADC using open-loop residue amplification

Precision amplifiers dominate the power dissipation in most high-speed pipelined analog-to-digital converters (ADCs). We propose a digital background calibration technique as an enabling element to replace precision amplifiers by simple power-efficient open-loop stages. In the multibit first stage of a 12-bit 75-MSamples/s proof-of-concept prototype, we achieve more than 60% residue amplifier power savings over a conventional implementation. The ADC has been fabricated in a 0.35-/spl mu/m double-poly quadruple-metal CMOS technology and achieves typical differential and integral nonlinearity within 0.5 LSB and 0.9 LSB, respectively. At Nyquist input frequencies, the measured signal-to-noise ratio is 67 dB and the total harmonic distortion is -74 dB. The IC consumes 290 mW at 3 V and occupies 7.9 mm/sup 2/.