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A methodology to perform online self-testing for field-programmable analog array circuits 总被引:2,自引:0,他引:2
This paper presents a methodology to perform online self-testing for analog circuits implemented on field-programmable analog arrays (FPAAs). It proposes to partition the FPAA circuit under test into subcircuits. Each subcircuit is tested by replicating the subcircuit with programmable resources on the FPAA chip, and comparing the outputs of the subcircuit and its replication. To effectively implement the proposed methodology, this paper proposes a simple circuit partition method and develops techniques to address circuit stability problems that are often encountered in the proposed testing method. Furthermore, error sources in the proposed testing circuit are studied and methods to improve the accuracy of testing results are presented. Finally, experimental results are presented to demonstrate the validity of the proposed methodology. 相似文献
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This paper presents efficient built-in-self-testing (BIST) techniques for programmable capacitor arrays (PCAs) on field programmable analog array (FPAA) platforms. The proposed BIST circuits consist of switched-capacitor (SC) integrators and analog window comparators. Taking advantage of FPAA programmable resources, the proposed PCA BIST circuits can be implemented with very small hardware overhead. Also the impact of comparator threshold variations as well as other circuit parasitic effects on the efficiency of the proposed testing method is investigated. Effective circuit techniques along with new comparator designs are presented to minimize the adverse effect of comparator threshold variations. Finally, procedures for using the proposed BIST method to systematically test all PCAs on an FPAA platform are described and experimental results are presented. 相似文献
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