Cointegration of Gate-All-Around MOSFETs and Local Silicon-on-Insulator Optical Waveguides on Bulk Silicon

In this work we present a bulk silicon technology platform able to cointegrate gate-all-around (GAA) MOSFETs and local SOI waveguides with pentagonal cross section. Wire diagonals of 100-800 nm are obtained using a lithographic resolution of 0.8 mum. Well-functioning triangular multigate MOSFETs are reported, and tested up to 150 degC. A significant increase is observed in the low-field mobility mu₀ for small devices (W_effles500 nm), which is attributed to local volume inversion in the corners. Preliminary characterization of the optical waveguides is carried out, showing optical losses of a few dB/cm. The processing is entirely CMOS compatible, does not require access to advanced lithography equipment, and is based on a silicon bulk substrate. Thus, this technology might serve as the basis for a low-cost, high-performance optical signaling platform     

Punch-through impact ionization MOSFET (PIMOS): From device principle to applications

In the present work a punch-through impact ionization MOSFET (PIMOS) is presented, which exploits impact ionization in low-doped body-tied Ω- and tri-gate structures to obtain abrupt switching (3–10 mV/decade) combined with a hysteresis in the I_D(V_DS) and I_D(V_GS) characteristics. The PIMOS device shows an extraordinary temperature stability up to 125 °C. The influence of various parameters on device performance as abrupt switch or memory cell is investigated. Reduction of the electrical channel length, i.e. of gate length and/or substrate doping, reduces the breakdown voltage and hence the DRAM operating voltage, but also increase the I_off. Two architectures for a capacitor-less DRAM cell are demonstrated and evaluated. In addition, a PIMOS n-type hysteretic inverter is demonstrated, which may serve as a 1T SRAM cell.     

Solid-state diffusion as an efficient doping method for silicon nanowires and nanowire field effect transistors

In this work we investigate doping by solid-state diffusion from a doped oxide layer, obtained by plasma-enhanced chemical vapor deposition (PECVD), as a means for selectively doping silicon nanowires (NWs). We demonstrate both n-type (phosphorous) and p-type (boron) doping up to concentrations of 10(20) cm(-3), and find that this doping mechanism is more efficient for NWs as opposed to planar substrates. We observe no diameter dependence in the range of 25 to 80 nm, which signifies that the NWs are uniformly doped. The drive-in temperature (800-950?°C) can be used to adjust the actual doping concentration in the range 2 × 10(18) to 10(20) cm(-3). Furthermore, we have fabricated NMOS and PMOS devices to show the versatility of this approach and the possibility of achieving segmented doping of NWs. The devices show high I(on)/I(off) ratios of around 10(7) and, especially for the PMOS, good saturation behavior and low hysteresis.     

Nanoscale strain characterisation for ultimate CMOS and beyond

Strain engineering is used to maintain Moore's Law in scaled CMOS devices and as a technology booster for More-than-Moore devices in the nanoelectronics era. Strain is crucial because of its ability to increase electron and hole mobilities in Si. However, accurate correlations between electrical performance and strain measurements are needed to enable the necessary feedback between materials, processing and devices to achieve best possible solutions. In this work, we outline new methods for sensitive 3D profiling of strain on a nanoscale. High-resolution vertical and lateral strain profiles applicable to both global (biaxial) and process-induced (uniaxial) strained Si devices are demonstrated. Raman spectroscopy is pushed to its present limit for precise analysis of strain in small geometry devices, including the use of tip-enhanced Raman spectroscopy (TERS) to improve the spatial resolution further. TERS maps are compared with atomic force microscopy data collected simultaneously and show that variations in surface morphology correlate directly with strain in the epitaxial layers. Sub-nm strain profiling is applied to strained Si and SiGe MOSFET channels. Strain is profiled across patterned uniaxial strained-Si-on-insulator structures and analysed in bended nanowire transistors. Finally strain is investigated across the channel regions of electrically measured SiGe p-MOSFETs. Good agreement between nanoscale strain measurements and finite element modelling is demonstrated. Sample preparation is included in the analysis and genuine effects of processing are investigated.     

Experimental study of the process dependence of Mo, Cr, Ti, and W silicon Schottky diodes and contact resistance

This paper reports on the process dependence and electrical characterization of Schottky diodes and ohmic contacts fabricated on p- and n-type silicon wafers. Four metals are systematically studied using identical test structures and characterization methods: Mo, Ti, W, and Cr. The choice of these metals is motivated by their midgap barriers and compatibility with an integrated circuit technology. For these, a thorough investigation of the variation in Schottky-barrier height and contact resistance is carried out for the following process parameters: 1) predeposition wafer preparation, 2) deposition method (sputtering and e-beam evaporation), 3) deposition temperature for the sputtered samples, and 4) annealing. It is found that RF etching previous to metal deposition increases the contact resistance and the barrier height for diodes on p-type silicon. This is of great importance, since RF etching is a very common in situ cleaning process in microelectronic and microelectromechanical systems technologies. Annealing can be used to restore the values of barrier height and contact resistance on wafers exposed to the RF etching.     

Optimum PCF tapers for blue-enhanced supercontinuum sources

Tapering of photonic crystal fibers has proven to be an effective way of blueshifting the dispersive wavelength edge of a supercontinuum spectrum down in the deep-blue. In this article we will review the state-of-the-art in fiber tapers, and discuss the underlying mechanisms of supercontinuum generation in tapers. We show, by introducing the concept of a group-acceleration mismatch, that for a given taper length, the downtapering section should be as long as possible to enhance the amount of blueshifted light. We also discuss the noise properties of supercontinuum generation in uniform and tapered fibers, and we demonstrate that the intensity noise at the spectral edges of the generated supercontinuum is at a constant level independent on the pump power in both tapered and uniform fibers.