SiO<Subscript><Emphasis Type="Italic">x</Emphasis></Subscript> layer formation during plasma sputtering of Si and SiO<Subscript>2</Subscript> targets

Deposition of SiO _x layers of variable composition onto silicon wafers was performed by co-sputtering of spaced Si and SiO₂ targets in argon plasma. Coordinate dependences of the thickness and refractive index of separately deposited Si and SiO₂ layers and the SiO _x layer grown during co-sputtering of targets were determined using optical techniques. It was shown that the SiO _x layer composition is not equal to a simple sum of thicknesses of separately deposited Si and SiO₂ layers. The coordinate dependences of the Si and SiO₂ layer thicknesses were calculated. To fit the calculated and experimental data, it is necessary to assume that no less than 10% of silicon is converted to dioxide during co-sputtering. A comparison of the coordinate dependences of the IR absorbance in SiO₂ and SiO _x layers with experimental ellipsometric data confirmed the presence of excess oxygen in the SiO _x layer. Taking into account such partial oxidation of sputtered silicon, composition isolines in the substrate plane were calculated. After annealing of the SiO _x layer at 1200°C, photoluminescence was observed in a wafer area predicted by calculations, which was caused by the formation of quantum-size Si nanocrystallites. The photoluminescence intensity was maximum at x = 1.78 ± 0.3, which is close to the composition optimum for ion-beam synthesis of nanocrystals.     

Charge spectroscopy of SiO<Subscript>2</Subscript> layers with embedded silicon nanocrystals modified by irradiation with high-energy ions

The method of charge deep-level transient spectroscopy (Q-DLTS) is used to study and compare the ejection of charge carriers from silicon nanocrystals (NCs) located in an ordered or random way in the SiO₂ matrix. It is shown that, in all cases, this ejection is a thermally activated process. The parameters of energy barriers characterizing the processes of ejection of charge carriers from the levels of nanocrystals in the layers NCs:SiO₂ before (random distribution) and after their modification by irradiation with high-energy ions (ordered distribution of nanocrystals) are determined. It is found that the activation energies for ejection of charge carriers from nanocrystals and the size of nanocrystals estimated from the difference between energies of two levels observed by the Q-DLTS method decrease as the ion fluence is increased. The density of nanocrystals observed by the Q-DLTS method decreases by approximately an order of magnitude as a result of irradiation with fluence of 10¹²–10¹³ cm⁻² in comparison with an initial unirradiated structure; this decrease is due to formation of conducting chains of nanocrystals in tracks.     

Redundancy revisited

This paper shows that when it comes to complementary metal-oxide-semiconductor (CMOS) designs undetectability does not necessarily imply redundancy. The definition of redundancy is extended to account for the special behavior encountered in CMOS designs. The accuracy of the new redundancy definition has been tested on several CMOS chips and has been found to be correct     

Fluorescein angiography in syphilitic retinal vasculitis

Bilateral injections of norepinephrine bitartrate (5.0-20.0 microng) into the preoptic region and anterior hypothalamus were always followed by a reduction in core temperature and rate of behaviorally obtaining radiant heat in cold-exposed (5 degrees C) squirrel monkeys regardless of whether the temperature of this region was experimentally raised (40-42 degrees C) or lowered (32-34 degrees C). Decreases in tail temperature following injections of norepinephrine indicated that vasoconstriction was also associated with the reduction in body temperature and behavioral responses. Since conflicting behavioral and autonomic responses are observed following injections of norepinephrine, it is suggested that norepinephrine may be affecting thermoregulatory effector pathways nonspecifically rather than altering the set point about which body temperature is regulated.     

Dismembered pyeloplasty in children with and without stents

OBJECTIVES: To assess the benefit of performing nonstented pyeloplasty in infants. METHODS: Forty-eight consecutive pyeloplasties were performed by two surgeons using different techniques, from 1987 to 1992. One used stents in all cases (23) and the other performed a nonstented anastomosis with external drainage (25 cases). Patients with specific indications for internal drainage, i.e. poor renal function, extreme pyelocaliectasis, were excluded from the study. Parameters of cost and complications were assessed. RESULTS: The group with stents had more febrile episodes, needed more antibiotics and were hospitalized twice as long as the nonstented group. Pre- and postoperative renal function was similar in both groups. CONCLUSIONS: Performing pyeloplasties in children without stenting the anastomosis is safe and cost-effective.     

AC product defect level and yield loss

The AC defect level and yield loss after test for both logic and random-access memory (RAM) semiconductor chips is considered. Computation of chip AC defect level and yield loss, after test, is dependent upon the availability of statistical information regarding the behavior of the chip's delay and of the test error. This statistical information can either be derived from manufacturing process parameters or measured by a tester. The tester accuracy and the test coverage in computing the AC defect level and yield loss are taken into account     

Study of the layer-substrate interface in <Emphasis Type="Italic">nc</Emphasis>-Si-SiO<Subscript>2</Subscript>-<Emphasis Type="Italic">p</Emphasis>-Si structures with silicon quantum dots by the method of temperature dependences of photovoltage

Layers grown by magnetron deposition of Si and SiO₂ on a p-type silicon substrate and containing silicon nanocrystals in the oxide matrix have been studied by the method of temperature dependences of the capacitive photovoltage. The effect of the substrate orientation and natural oxidation preceding high-temperature annealing that results in the formation of Si nanocrystals in the SiO₂ matrix on the layer-substrate interface characteristics is studied. The density of fast interface states trapping majority carriers was estimated. It is found that structural changes occur at the layer-substrate interface in the case of a (111) substrate and are caused by stresses appearing upon cooling. It was shown that natural oxidation of the deposited layer, preceding high-temperature annealing, causes an increase in the charge trapped in the oxide.     

Delay Test Generation: A Hardware Perspective

An important problem one faces during design of a built-in self-test(BIST) based delay test is the selection of a proper generator toapply the test vectors. This problem is due to the need of applyinga pair of patterns to detect any given delay fault. The secondvector has to be launched against the logic immediately following thefirst vector. This timing requirement places severe restrictions onthe kind of hardware suitable for the task, especially in built-inself-test applications where the generator must reside on chip.This paper studies the various options one has in designing the delay test vector generator. Both scan and non-scan designs are addressed. Thedifferent options are measured based on their performance, cost, and flexibility.