湘衡盐矿十五万吨制盐集散控制系统简介

本文对我矿使用集散系统的控制原理、系统配置、各部分功能及生产运行情况加以简要介绍。     

Hot working characteristics of S32760 super duplex stainless steel

Journal of Mechanical Science and Technology - Hot deformation behavior of S32760 super austenitic stainless steel was studied in the temperature range of 950 ∼ 1250 °C and strain rate...     

基于动态随机前沿生产函数的水资源边际效益研究

将水资源作为生产要素,通过基于面向输出的C^2GS^2模型DEA相对有效性评价,建立有效生产前沿,分析产出的技术效率和生产要素的使用效率。利用具有积性误差的Hicks中性技术进步Cobb--Douglas生产函数,通过有效生产前沿时间序列数据COLS回归,建立动态随机前沿生产函数。利用序列数据建立序列与截面水资源边际效益模型、缺水损失模型及序列节水边际成本模型。     

Mobile Telecommunications Market Regulations and Carrier Performance: The Korean Case

This paper qualitatively and quantitatively examines the effectiveness of regulations currently in place in the Korean mobile telecommunications market by comparing their intended objectives with the actual outcome, particularly with respect to the performance of market participants. The results show that the regulations have generally been effective in lowering the average revenue per user of carriers. However, the managed competition efforts of the government have also resulted in increased revenues for the top two carriers in the market without significantly affecting their general business operations.     

现代EDA技术在RISC模型机中的应用

RISC自二十世纪八十年代后期兴起后一直是计算机发展的主流 ,因此学习和掌握 EDA技术及 RISC的设计原理 ,采用现代 EDA技术设计一台 RISC模型机 ,对进一步深入研究 EDA技术在新一代微处理器中的应用具有重大的意义。文中主要介绍了 RISC微处理器设计遵循的一般原则 ,RISC模型机的内部结构设计原理及硬联线控制器的 VHDL软件设计方法。最后给出了模型机系统的性能测试结果     

套袋日、韩梨耐藏性研究初探

以新世纪品种为试材进行常温和低温贮藏的对比试验,以新高、华山、甘泉、黄金、秋黄、圆黄等为试材进行货架期的观察试验。试验结果显示:新世纪常温(18℃)下贮藏,品质最佳时期为7~10d以内,低温(5℃)下贮藏,品质最佳时期为45d以内;新高等6个品种在12d的货架期中,硬度降低和质地软绵的速度明显加快,果皮、果肉逐渐褐变,而可溶性固形物的变化不甚明显。新高、圆黄这两个品种的综合品质较好。     

Microbiological Quality and Safety of Fresh Fruits and Vegetables at Retail Levels in Korea

The aim of this study was to evaluate the microbiological quality and safety of fresh produce at retail level in Korea in order to periodically update information and establish available risks associated with consumption of fresh fruits and vegetables. The samples from different markets located in 3 provinces of South Korea were collected. The protocol in the Korean Food Standards Codex was applied and generic Escherichia coli, coliforms, aerobic mesophilic bacteria (AMB), and yeast and mold (YM) in 360 packaged and unpackaged fresh fruits and vegetables were analyzed. Presence of pathogens was examined using real‐time polymerase chain reaction (q‐PCR) after enrichment of samples. For all, the microbial counts ranged from 1.7 to 10.6 log cfu/g for AMB, 2.2 to 7.9 log cfu/g for coliforms, and 5.5 to 7.9 log cfu/g for YM. Three lettuce samples were contaminated by E. coli with a bacterial load ranging from 2 to 4 log cfu/g. Salmonella spp. were not detected in any fresh produce. Listeria monocytogenes, E. coli O157:H7, and Staphylococcus aureus were found in 1 (0.6%), 3 (0.8%), and 5 (1.4%) fresh produce samples, respectively. Bacillus cereus (50.3%) and Clostridium perfringens (13.3%) had the highest prevalence. These results indicate the need for employing strict control measures and developing preventive strategies to improve the quality and safety of fresh produce in Korea.     

船用交流供电系统电容漏电流自动测量补偿方法

舰船交流供电系统中。多采用中性点不接地运行方式，由于系统对地电容泄漏电流的存在．对电力系统供电安全带来隐患。本文针对舰船供电系统，提出了采用单片机控制系统，对电网对地电容漏电流进行实时跟踪测量。利用磁阀式消弧线圈对其进行自动补偿的方法。     

契贝谢夫曲面拟合在趋势面分析中的应用

各种物探方法的测量成果往往是用数据表示的。例如某一地层面的深度或某一地区的重力值。这些数据包含两方面的变化,一是反映总趋势的变化,即区域背景;二是反映局部变化,即去掉区域背景的剩余值。把这些离散的数据(例如深度)点变成反映构造形态的地层面,可以用数学上的曲面拟合来实现。本文介绍的方法是用契贝谢夫曲面拟合法来实现趋势面分析,并与最小二乘法拟合结果进行了比较。实验表明,契贝谢夫曲面拟合优于最小二乘法拟合。     

Sources of Hysteresis in Carbon Nanotube Field‐Effect Transistors and Their Elimination Via Methylsiloxane Encapsulants and Optimized Growth Procedures

The origins of gate‐induced hysteresis in carbon nanotube field‐effect transistors are explained and techniques to eliminate this hysteresis with encapsulating layers of methylsiloxane and modified processes for nanotube growth are reported. A combined experimental and theoretical analysis of the dependence of hysteresis on the gate voltage sweep‐rate reveals the locations, types, and densities of defects that contribute to hysteresis. Devices with designs that eliminate these defects exhibit more than ten times reduction in hysteresis compared to conventional layouts. Demonstrations in individual transistors that use both networks and arrays of nanotubes, and in simple logic gates built with these devices, illustrate the utility of the proposed approaches.