Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors

Wafer-level packaging (WLP) technology offers novel opportunities for the realization of high-quality on-chip passives needed in RF front-ends. This paper demonstrates a thin-film WLP technology on top of a 90-nm RF CMOS process with one 15-GHz and two low-power 5-GHz voltage-controlled oscillators (VCOs) using a high-quality WLP or above-IC inductor. The 5-GHz VCOs have a power consumption of 0.33 mW and a phase noise of -115 dBc/Hz and -111 dBc/Hz at 1-MHz offset, respectively, and the 15-GHz VCO has a phase noise of -105 dBc/Hz at 1-MHz offset with a power consumption of 2.76 mW.     

Performance degradation of LC-tank VCOs by impact of digital switching noise in lightly doped substrates

In mixed analog-digital designs, digital switching noise is an important limitation for the performance of analog and RF circuits. This paper reports a physical model describing the impact of digital switching noise on LC-tank voltage-controlled oscillators (VCOs) in lightly doped substrates. The model takes into account the propagation from the source of substrate noise to the different components in the VCO and the resulting modulation of the oscillator frequency. The model is validated with measurements on a 3.5-GHz LC-tank VCO designed in 0.18-/spl mu/m CMOS. It reveals that for this VCO, impact occurs mainly via the nonideal metal ground lines for lower frequencies and low tuning voltage and via the integrated inductors for higher frequencies and high tuning voltage. To make the design immune to substrate noise, the parasitic resistance of the on-chip ground interconnect has to be kept as low as possible and inductors have to be shielded. Hence, the developed model allows investigating the dominant mechanisms behind the impact of substrate noise on a VCO, which is crucial information for achieving a substrate noise immune design.     

Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate

Substrate noise is a major obstacle for mixed-signal integration. Ground bounce is a major contributor to substrate noise generation due to the resonance caused by the inductance and the Vdd-Vss admittance that consists of the on-chip digital circuit capacitance of the MOS transistors, the decoupling, and the parasitics arising from the interconnect. In this paper, we address: 1) the dependence of the Vdd-Vss admittance on the different states of the circuit, the supply voltage, and the interconnect, and 2) the computation of the total supply current with ground bounce. By using a fast and accurate macromodeling approach, the Vdd-Vss admittances of several test circuits are computed with 2%-3% error relative to the values simulated from the complete SPICE level netlist, but several orders of magnitude faster in CPU time and with 10% maximum error relative to the measurements on a test ASIC fabricated in a 0.18-/spl mu/m CMOS process on a high-ohmic substrate with 18 /spl Omega//spl middot/cm resistivity. The measurements also show that this admittance mainly depends only on the connectivity of the gates to the supply rail rather than their connectivity among each other.     

Ultra-wide-band transmitter for low-power wireless body area networks: design and evaluation

The successful realization of a wireless body area network (WBAN) requires innovative solutions to meet the energy consumption budget of the autonomous sensor nodes. The radio interface is a major challenge, since its power consumption must be reduced below 100 /spl mu/W (energy scavenging limit). The emerging ultra-wide-band (UWB) technology shows strong advantages in reaching this target. First, most of the complexity of an UWB system is in the receiver, which is a perfect scenario in the WBAN context. Second, the very little hardware complexity of a UWB transmitter offers the potential for low-cost and highly integrated solutions. Finally, in a pulse-based UWB scheme, the transmitter can be duty-cycled at the pulse rate, thereby reducing the baseline power consumption. We present a low-power UWB transmitter that can be fully integrated in standard CMOS technology. Measured performances of a fully integrated pulse generator are provided, showing the potential of UWB for low power and low cost implementations. Finally, using a WBAN channel model, we present a comparison between our UWB solution and state-of-the-art low-power narrow-band implementations. This paper shows that UWB performs better in the short range due to a reduced baseline power consumption.     

Three year results of in vitro production of bovine embryos in serum-poor bovine oviduct conditioned medium. An overview

This paper presents a synthesis of 3 year results of in vitro production of bovine embryos in medium previously conditioned by bovine oviduct epithelial cells. In Louvain-la-Neuve, Belgium, a total of 18356 oocytes were matured and inseminated in vitro: 13967 (76%) had cleaved at 3 days post-insemination and 3593 (26%) became blastocysts using this culture system. Our data show that conditioned medium can be stored frozen for up to 3 years without significant loss of activity and is resistant to lyophilization. One single batch of conditioned medium was tested within the same period in four different laboratories and yielded variable results: 27 and 37% blastocysts/cleaved embryos in two of them and only 7 and 0% in the two others whereas in each case more than 30% blastocysts were obtained with the local reference co-culture system. In one laboratory, the batch of oil used to overlay the culture drops had a detrimental effect on the blastocyst rate in conditioned medium but not in co-culture.     

Compensation of IQ imbalance and phase noise in OFDM systems

Nowadays, a lot of effort is spent on developing inexpensive orthogonal frequency-division multiplexing (OFDM) receivers. Especially, zero intermediate frequency (zero-IF) receivers are very appealing, because they avoid costly IF filters. However, zero-IF front-ends also introduce significant additional front-end distortion, such as IQ imbalance. Moreover, zero-IF does not solve the phase noise problem. Unfortunately, OFDM is very sensitive to the receiver nonidealities IQ imbalance and phase noise. Therefore, we developed a new estimation/compensation scheme to jointly combat the IQ imbalance and phase noise at baseband. In this letter, we describe the algorithms and present the performance results. Our compensation scheme eliminates the IQ imbalance based on one OFDM symbol and performs well in the presence of phase noise. The compensation scheme has a fast convergence and a small residual degradation: even for large IQ imbalance, the overall system performance for an OFDM-wireless local area network (WLAN) case study is within 0.6 dB of the optimal case. As such, our approach greatly relaxes the mismatch specifications and thus enables low-cost zero-IF receivers.     

Analysis and experimental verification of digital substrate noisegeneration for epi-type substrates

Substrate coupling in mixed-signal IC's can cause important performance degradation of the analog circuits. Accurate simulation is therefore needed to investigate the generation, propagation, and impact of substrate noise. Recent studies were limited to the time-domain behavior of generated substrate noise and to noise injection from a single noise source. This paper focuses on substrate noise generation by digital circuits and on the spectral content of this noise. To simulate the noise generation, a SPICE substrate model for heavily doped epi-type substrates has been used. The accuracy of this model has been verified with measurements of substrate noise, using a wide-band, continuous-time substrate noise sensor, which allows accurate measurement of the spectral content of substrate noise. The substrate noise generation of digital circuits is analyzed, both in the time and frequency domain, and the influence of the different substrate noise coupling mechanisms is demonstrated. It is shown that substrate noise voltages up to 20 mV are generated and that, in the frequency band up to 1 GHz, noise peaks are generated at multiples of the clock and repetition frequency. These noise signals will strongly deteriorate the behavior of small signal analog amplifiers, as used in integrated front-ends     

Optimization of hydrolysis of sardine (Sardina pilchardus) heads with Protamex: enhancement of lipid and phospholipid extraction

BACKGROUND: Fish by‐products are not considered as valuable raw materials even if they usually contain valuable components such as lipids. Fish lipids are well known for their nutritional potential and health effects but their extraction remains problematic due to the use of organic solvents. Enzymatic hydrolysis such as the proteolysis of tissues can lead to lipid extraction. RESULTS: Hydrolysis of sardine heads by Protamex was studied (temperature, hydrolysis time and enzyme–substrate ratio) using response surface methodology in order to obtain the highest release of lipids and particularly phospholipids. No relation between the degree of hydrolysis and lipid recovery were depicted; however, optimum conditions for both the release of lipids and phospholipids were found to be similar (29 min, 31 °C with 2.6 g kg^?1 enzyme). Under these hydrolysis conditions, rich lipid and phospholipid fractions (oily and aqueous fractions) can be recovered when time, temperature and enzyme consumption are minimized. Analytical data have revealed that they contain high‐quality lipids, especially ω3 fatty acid. CONCLUSION: This study demonstrated that proteolysis can be used for high lipid recovery from little‐exploited biomass like fish heads without requiring solvent or thermal treatment. Resulting phospholipids, fatty acids and peptides could be utilized for nutritional or feed purposes. Copyright © 2009 Society of Chemical Industry     

The incremental validity of vocational self-efficacy: An examination of interest, self-efficacy, and occupation.

The authors examined the incremental validity, beyond vocational interest, of the General Confidence Themes of the Skills Confidence Inventory (N. E. Betz, F. H. Borgen, & L. W. Harmon, 1996a) as measures of vocational self-efficacy in identifying tenured and satisfied membership in 21 occupational groups for 1,105 employed women and men. The General Occupational Themes of the Strong Interest Inventory (L. W. Harmon, J. C. Hansen, F. H. Borgen, & A. L. Hammer, 1994) were used to measure interest. The results replicated T. J. G. Tracey's (1997) finding that self-efficacy and interest form similar structures. Results also demonstrated the explanatory power of self-efficacy and interest and the incremental validity of self-efficacy. The authors suggest that the Skills Confidence Inventory is (a) a valid measure of tenured and satisfied occupational membership, (b) a distinct measure from interest but similar in structure, and (c) a potentially useful career assessment measure. (PsycINFO Database Record (c) 2010 APA, all rights reserved)     

Substrate noise generation in complex digital systems: efficient modeling and simulation methodology and experimental verification

More and more system-on-chip designs require the integration of analog circuits on large digital chips and will therefore suffer from substrate noise coupling. To investigate the impact of substrate noise on analog circuits, information is needed about digital substrate noise generation. In this paper, a recently proposed simulation methodology to estimate the time-domain waveform of the substrate noise is applied to an 86-Kgate CMOS ASIC on a low-ohmic epi-type substrate. These simulation results have been compared with substrate noise measurements on this ASIC and the difference between the simulated and measured substrate noise rms voltage is less than 10%. The simulated time domain waveform and frequency spectrum of the substrate noise correspond well with the measurements, indicating the validity of this simulation methodology. Both measurements and simulations have been used to analyze the substrate noise generation in more detail. It has been found that direct noise coupling from the on-chip power supply to the substrate dominates the substrate noise generation and that more than 80% of the substrate noise is generated by simultaneous switching of the core cells. By varying the parameters of the simulation model, it has been concluded that a flip-chip packaging technique can reduce the substrate noise rms voltage by two orders of magnitude when compared to traditional wirebonding.