The Trigger System for the Collider Detector Facility

The trigger logic for the Collider Detector Facility (CDF) at Fermilab is described. An analog/digital system constructs triggers based on clusters of energy in the calorimetry. These triggers are then combined with signals from the muon and central tracking systems to make a global trigger. Two levels of trigger logic have been implemented: a 'Level 1' trigger which is dead-timeless, and a more sophisticated Level 2 trigger. The rejection factor provided by these two systems will be 103 - 104.     

Recent results for the CMS tracker silicon detectors

The paper reports on a detailed study of the radiation resistance of p⁺ on n silicon microstrip detectors for the CMS tracking system. From this study, it is seen that the use of low-resistivity substrates with 〈100〉 crystal lattice orientation promises excellent performance of the Inner Tracker after heavy irradiation in the Large Hadron Collider environment. Furthermore, the advantage of using detectors thicker than 300 μm in the Outer Tracker is discussed together with experimental measurements on prototypes     

igh statistics study of radiation damage on silicon microstripdetectors

This paper investigates the performance of silicon microstrip detectors after heavy irradiation. Full-size prototype sensors (53 × 64 mm²) designed for the CMS Tracker have been irradiated with protons and extensively studied in the laboratory and using a beam of minimum ionising particles operated at low temperature as foreseen for the Large Hadron Collider. We present results of large statistics measurements of collected charge, noise, position resolution, and hit finding efficiency for these irradiated detectors     

A two-level fanout system for the CDF silicon vertex tracker

The Fanout system is part of the Silicon Vertex Tracker (SVT), a new trigger processor designed to reconstruct charged particle trajectories at level 2 (L2) of the CDF trigger, with a latency of 10 μs and an event rate up to 100 kHz. The core of SVT is organized as 12 identical slices, which process in parallel the data from the 12 independent azimuthal wedges of the Silicon Vertex Detector (SVXII). Each SVT slice links the digitized pulse heights found within one SVXII wedge to the tracks reconstructed by the level I (L1) fast track finder (XFT) in the corresponding 30° angular region of the Central Outer Tracker (COT). Since the XFT tracks are transmitted to SVT as a single data stream, their distribution to the proper SVT slices requires dedicated fanout logic. The fanout system has been implemented as a multiboard project running on a common 20 MHz clock. Track fanout is performed in two steps by one "Fanout A" and two "Fanout B" boards. The architecture, design, and implementation of this system are described