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A.A. Carter J.R. Carter R.D. Heuer S. Jaroslawski A. Wagner D.R. Ward 《Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment》1986,250(3):503-513
A fast hardware track trigger processor being built for the OPAL experiment is described. The processor will analyse data from the central drift chambers of OPAL to determine whether any tracks come from the interaction region, and thereby eliminate background events. The processor will find tracks over a large angular range, |cos θ| 0.95. The design of the processor is described, together with a brief account of its hardware implementation for OPAL. The results of feasibility studies are also presented. 相似文献
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Jaroslawski S. Jeffs M. Matson R. Milborrow R. White D. 《IEEE transactions on nuclear science》1990,37(5):1584-1588
The vertex detector front-end electronics are described. It comprises fast analog-to-digital conversion circuits and a fast programmable track trigger processor. The function of the electronics is to examine, within one large electron-positron beam crossing (22 μs), data generated in the detector for the evidence of charged particle tracks. Measurements of ionization drift times are based on a gated 93-MHz oscillator synchronized to a precision crystal clock and give points in space. The axial positions of these points along the detector are found by analyzing the difference in time of arrivals of signals at the ends of the detector (z by timing). Particle tracks are found by 36 track finders operating in parallel and are matched by semicustom coincidence chips. The track information is used in the first stage of data reduction in the Opal experiments (the first-level trigger) 相似文献
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