Standing on Solid Ground

The new Editor in Chief of IEEE Micro introduces himself and the first issue of 2007. He thanks outgoing Editor in Chief Pradip Bose for his outstanding work on Micro during his tenure. He assesses the current state of the microarchitecture field, speculates on the future, and asks readers for their suggestions on topics the magazine should cover in coming issues.     

On-Chip Optical Technology in Future Bus-Based Multicore Designs

This work investigates the integration of CMOS-compatible optical technology to on-chip coherent buses for future CMPs. The analysis results in a hierarchical optoelectrical bus that exploits the advantages of optical technology while abiding by projected limitations. This bus achieves significant performance improvement for high-bandwidth applications relative to a state-of-the-art fully electrical bus     

Dynamic frequency and voltage scaling for a multiple-clock-domain microprocessor

Multiple clock domains is one solution to the increasing problem of propagating the clock signal across increasingly larger and faster chips. The ability to independently scale frequency and voltage in each domain creates a powerful means of reducing power dissipation. A multiple clock domain (MCD) microarchitecture, which uses a globally asynchronous, locally synchronous (GALS) clocking style, permits future aggressive frequency increases, maintains a synchronous design methodology, and exploits the trend of making functional blocks more autonomous. In MCD, each processor domain is internally synchronous, but domains operate asynchronously with respect to one another. Designers still apply existing synchronous design techniques to each domain, but global clock skew is no longer a constraint. Moreover, domains can have independent voltage and frequency control, enabling dynamic voltage scaling at the domain level.     

Editor in Chief's Message: Truly "hot" chips--Do we still care?

Despite the move away from very high-frequency, high-ILP cores to multiple, more modest cores ("multicore"), power is still a huge, unsolved problem for the microprocessor industry. The emphasis is no longer power-aware processor microarchitecture but power-aware systems architecture. The "system" extends from the multicore system-on-chip to the external memory, disks, indeed to the entire enterprise. The data center has arisen as a major target of power-related computer architecture research. The greater question is, in our attempts to make the world's information available to all in the blink of an eye, what is the environmental cost, and how can we as a research community address this problem?     

A Mean Value Analysis Multiprocessor Model Incorporating Superscalar Processors and Latency Tolerating Techniques

Several approximate Mean Value Analysis (MVA) shared memory multiprocessor models have been developed and used to evaluate a number of system architectures. In recent years, the use of superscalar processors, multilevel cache hierarchies, and latency tolerating techniques has significantly increased the complexity of multiprocessor system modeling. We present an analytical performance model which extends previous multiprocessor MVA models by incorporating these new features and in addition, increases the level of modeling detail to improve flexibility and accuracy. The extensions required to analyze the impact of these new features are described in detail. We then use the model to demonstrate some of the tradeoffs involved in designing modern multiprocessors, including the impact of highly superscalar architectures on the scalability of multiprocessor systems.     

Mixing It Up

Micro's editor in chief introduces the topics covered by the four articles in this general-interest issue: an interconnection network using highly integrated photonic technology; the ManySim simulation framework for future large-scale chip-multiprocessors; the SimWattch simulation framework, which integrates the Simics functional simulator with the SimpleScalar/Wattch microarchitecture simulators; and self-configuring embedded systems.     

More Hot Stuff

While leading computing corporations have instituted "green data center" and "eco-responsible computing" initiatives, the computer architecture community as a whole has drifted away from power-aware architecture and on to the next topic. Arguably, power remains the computer architecture topic with the most potential for societal impact. Albonesi exhorts Micro readers to re-emphasize power-related research and outlines a few of the most pressing issues.     

Dynamically tuning processor resources with adaptive processing

By using adaptive processing to dynamically tune major microprocessor resources, developers can achieve greater energy efficiency with reasonable hardware and software overhead while avoiding undue performance loss. Adaptive processors require few additional transistors. Further, because adaptation occurs only in response to infrequent trigger events, the decision logic can be placed into a low-leakage state until such events occur.