Reducible rank codes and their applications to cryptography

We present a new family of so-called reducible rank codes which are a generalization of rank product codes . This family includes maximal rank distance (MRD) codes for lengths n>N in the field F/sub N/. We give methods for encoding and decoding reducible rank codes. A public key cryptosystem based on these codes and on the idea of a column scrambler is proposed. The column scrambler "mixes" columns of a generator (parity-check) matrix of a code. It makes the system more resistant to structural attacks such as Gibson's attacks. Possible attacks on the system are thoroughly studied. The system is found to be secure against known attacks for public keys of about 16 kbits and greater.     

Bayes estimators for reliability measures in geometric distribution model using masked system life test data

This paper presents Bayes estimators for the reliability measures of the individual components in a multi-component systems in the presence of masked system life test data. The life time distributions of the system components are assumed to be geometric with different parameters. Two-sided Bayesian probability intervals of the parameters are also derived. Numerical simulation study is given in order to: (i) explain how one can apply the theoretical results obtained, (ii) study the influence of the sample size and masking level on the accuracy of point estimates.     

Non-parametric empirical Bayes procedure

In this paper we introduce an empirical Bayes procedure for estimating an unknown parameter, say θ. This procedure gives the empirical Bayes estimator for θ and its associated minimum posterior risk in closed forms without estimating the unknown prior density function of θ. In such procedure the posterior probability density function of θ is not required. A sufficient statistic for θ with conditional probability density function in the one parameter exponential family is required. Instead of estimating the unknown prior density function, the marginal density function of the sufficient statistic must be estimated. As special cases the empirical Bayes estimators and their respective minimum posterior risks of the failure rate for the exponential distribution, the unknown scale parameters of Weibull and gamma distributions are obtained in simple forms as special cases. Numerical results and a simulation study are introduced to (i) investigate how the number of available past experiments and the sample size of each influence the accuracy of the empirical Bayes estimator, (ii) make a comparison between the presented procedure and the Bayes procedure when the prior probability density function of the parameter θ is gamma.     

Optimisation of solar photovoltaic (PV) parameters using meta-heuristics

Microsystem Technologies - This paper presents a critical analysis of the meta-heuristic techniques used in various researches on the optimisation of photovoltaic (PV) parameters, which involves...     

The Valve Metal Character of Zirconium as inferred from anode potential measurements in mineral acid solutions

A study on the value metal character of Zr in 0.1 M solutions of H₂SO₄, HNO₃, and H₃PO₄ has been performed using the anode potential as the primary variable in galvanostatic, potentiostatic, and capacity measurements. A method of surface pre-treatment, which suppresses both O₂ evolution and metal dissolution, has been described. Kinetic parameters of oxide growth have been calculated. The results indicate that:

• (i) the high field approximation is applicable following an exponential law, and
• (ii) the height and activation distance of the energy barrier for ion transport through the oxide phase (Verwey model) are the same three acids.

Measurements have been also made on the dielectric breakdown of oxide, and this occurs at potentials above 200 V. Direct capacity measurements give similar results as those based on reciprocal capacity calculated from galvanostatic experiments. It is concluded that the dominant anodic oxide species is ZrO₂ having a dielectric constant of 25. Open circuit potential measurements show that Zr is spontaneously oxidized in the three acids.     

Effect of the Te/Si ratio on the electrical characteristics of the amorphous chalcogenide switches

The effect of composition on amorphous chalcogenide threshold switches of the system Si _x Te_60-x As₃₀Ge₁₀, wherex = 5, 10, 12 and 20, has been studied. The compositionx = 5 shows the best switching characteristics, e.g. the smallest holding voltage (V _h = 0.4V), the highest ON state current (I _h = 45A) and smallest threshold voltage (V _s = 1.5V). Applying the three mechanisms of conductance of Mottet al. (Phil. Mag. 37 (1975) 961), it is found that for a particular composition ₂ < ₁ < ₀ (the pre-exponential factors) andW ₂ < (E _a –E ₁ +W ₁) < (E _c –E _f) (whereE _a,E _c andE _e = activation energies at band edge, fermi level and conduction band;W ₁ andW ₂ = activation energy for hopping). It was found that the density of states at the fermi levelN(E _f) increases with the decrease of silicon content. The results provided further evidence against thermal interpretations and thereby support electronic models of threshold switching for these glass systems.     

PMSS: A programmable memory system and scheduler for complex memory patterns

HPC industry demands more computing units on FPGAs, to enhance the performance by using task/data parallelism. FPGAs can provide its ultimate performance on certain kernels by customizing the hardware for the applications. However, applications are getting more complex, with multiple kernels and complex data arrangements, generating overhead while scheduling/managing system resources. Due to this reason all classes of multi threaded machines–minicomputer to supercomputer–require to have efficient hardware scheduler and memory manager that improves the effective bandwidth and latency of the DRAM main memory. This architecture could be a very competitive choice for supercomputing systems that meets the demand of parallelism for HPC benchmarks. In this article, we proposed a Programmable Memory System and Scheduler (PMSS), which provides high speed complex data access pattern to the multi threaded architecture. This proposed PMSS system is implemented and tested on a Xilinx ML505 evaluation FPGA board. The performance of the system is compared with a microprocessor based system that has been integrated with the Xilkernel operating system. Results show that the modified PMSS based multi-accelerator system consumes 50% less hardware resources, 32% less on-chip power and achieves approximately a 19x speedup compared to the MicroBlaze based system.