Multiplexed noise shaping structures for delta-sigma modulators

A new structure for realising a multiplexed noise-shaping A/D convertor is proposed. It improves the performance of first- or second-order Delta Sigma modulators by employing additional feedback paths for suppressing the quantiser error. The structure, its theoretical analysis, and simulations confirming the improved resolution are presented.<>     

KernelHive: a new workflow‐based framework for multilevel high performance computing using clusters and workstations with CPUs and GPUs

The paper presents a new open‐source framework called KernelHive for multilevel parallelization of computations among various clusters, cluster nodes, and finally, among both CPUs and GPUs for a particular application. An application is modeled as an acyclic directed graph with a possibility to run nodes in parallel and automatic expansion of nodes (called node unrolling) depending on the number of computation units available. A methodology is proposed for parallelization and mapping of an application to the environment that includes selection of devices using a chosen optimizer, selection of best grid configurations for compute devices, optimization of data partitioning and the execution. One of possibly many scheduling algorithms can be selected considering execution time, power consumption, and so on. An easy‐to‐use GUI is provided for modeling and monitoring with a repository of ready‐to‐use constructs and computational kernels. The methodology, execution times, and scalability have been demonstrated for a distributed and parallel password‐breaking example run in a heterogeneous environment with a cluster and servers with different numbers of nodes and both CPUs and GPUs. Additionally, performance of the framework has been compared with an MPI + OpenCL implementation using a parallel geospatial interpolation application employing up to 40 cluster nodes and 320 cores. Copyright © 2015 John Wiley & Sons, Ltd.     

M.O.S. neural pulse modulator

Through control of the substrate-source voltage of the input transistor, output pulses can be controlled and modulated in an m.o.s. neural line.     

Design of Fully Balanced Analog Systems Based on Ordinary and/or Modified Single-Ended Opamps

The system architectures, which allow a high performance fully balanced (FB) system based on ordinary/modified single-ended opamps to be implemented, are investigated and the basic and general requirements are formulated. Two new methods of an FB analog system design, which contribute towards achieving both a high performance IC system implementation and a great reduction of the design time are presented. It is shown that a single-ended system based on any type of opamp (rail-to-rail, constant g _m , etc.), realized in any technology (CMOS, bipolar, BiCMOS, GaAs), can be easily and effectively converted to its FB counterpart in a very practical way. Using the proposed rules, any FB system implementation with opamps (data converter, modulator, filter, etc.) requires only a single-ended system version design and the drawbacks related to a conventional FB system design are avoided. The principles of the design are pointed out and they are verified by experimental results.     

Comparison of selected algorithms for scheduling workflow applications with dynamically changing service availability

This paper compares the quality and execution times of several algorithms for scheduling service based workflow applications with changeable service availability and parameters. A workflow is defined as an acyclic directed graph with nodes corresponding to tasks and edges to dependencies between tasks. For each task, one out of several available services needs to be chosen and scheduled to minimize the workflow execution time and keep the cost of service within the budget. During the execution ofa workflow, some services may become unavailable, new ones may appear, and costs and execution times may change with a certain probability. Rescheduling is needed to obtain a better schedule. A solution is proposed on how integer linear pro- gramming can be used to solve this problem to obtain optimal solutions for smaller problems or suboptimal solutions for larger ones. It is compared side-by-side with GAIN, divide-and-conquer, and genetic algorithms for various probabilities of service unavailability or change in service parameters. The algorithms are implemented and subsequently tested in a real BeesyCluster environment.     

Modeling, run-time optimization and execution of distributed workflow applications in the JEE-based BeesyCluster environment

The paper presents a complete solution for modeling scientific and business workflow applications, static and just-in-time QoS selection of services and workflow execution in a real environment. The workflow application is modeled as an acyclic directed graph where nodes denote tasks and edges denote dependencies between the tasks. The BeesyCluster middleware is used to allow providers to publish services from sequential or parallel applications, from their servers or clusters. Optimization algorithms are proposed to select a capable service for each task so that a global criterion is optimized such as a product of workflow execution time and cost, a linear combination of those or minimization of the time with a cost constraint. The paper presents implementation details of the multithreaded workflow execution engine implemented in JEE. Several tests were performed for three different optimization goals for two business and scientific workflow applications. Finally, the overhead of the solution is presented.     

Realisation of highly linear MOS circuits using negative impedance convertors

A novel method is proposed for realising linear resistors and inductors based on a current inversion-type negative impedance convertor (NIC) using MOSFETs in the nonsaturation region. Its application to continuous-time filters is also presented.<>     

Bandpass Delta Sigma A/D convertor using two-path multibit structure

The concept of an N-path bandpass Delta Sigma A/D convertor is introduced. A multibit sixth-order SC implementation is described. The new scheme appears to be very effective for the realisation of the narrowband bandpass delta-sigma modulators needed for communication applications.<>     

Pseudo-N-path switched capacitor filters with out-of-band noise peaks

Novel pseudo-N-path (PNP) switched-capacitor (SC) integrator structures which avoid noise peaks in the main passband are described. They combine the simplicity of the previously proposed RAM-type PNP SC circuits with the desirable properties of hybrid-type circuits. Simulation results are presented for filters employing these structures to verify their usefulness.<>     

MOS transconductors and integrators with high linearity

MOS transconductors are discussed in which the transistors determining the transconductance do not carry bias current, operate with large gate-source voltage, and are signal-driven in such a way that their nonlinearities are eliminated. An integrator implemented using one of the proposed circuits exhibited measured total harmonic distortion of less than 0.1% for differential input signals of 2.5 V p-p, and less than 1% for 5 V p-p.