Efficient implementation of modular multiplication over 192-bit NIST prime for 8-bit AVR-based sensor node

Modular multiplication is one of the most time-consuming operations that account for almost 80% of computational overhead in a scalar multiplication in elliptic curve cryptography. In this paper, we present a new speed record for modular multiplication over 192-bit NIST prime P-192 on 8-bit AVR ATmega microcontrollers. We propose a new integer representation named Range Shifted Representation (RSR) which enables an efficient merging of the reduction operation into the subtractive Karatsuba multiplication. This merging results in a dramatic optimization in the intermediate accumulation of modular multiplication by reducing a significant amount of unnecessary memory access as well as the number of addition operations. Our merged modular multiplication on RSR is designed to have two duplicated groups of 96-bit intermediate values during accumulation. Hence, only one accumulation of the group is required and the result can be used twice. Consequently, we significantly reduce the number of load/store instructions which are known to be one of the most time-consuming operations for modular multiplication on constrained devices. Our implementation requires only 2888 cycles for the modular multiplication of 192-bit integers and outperforms the previous best result for modular multiplication over P-192 by a factor of 17%. In addition, our modular multiplication is even faster than the Karatsuba multiplication (without reduction) which achieved a speed record for multiplication on AVR processor.

     

基于设备可用时间约束的装配作业车间调度规则

为开发自动和手控设备混合的装配作业车间启发式调度算法,设计了装配作业和设备特性相结合的生产调度规则.分析了自动和手控设备的运作特性,以及设备和作业者的日可用时间约束对生产调度所产生的影响.首先以缩短工件平均流程时间和提高自动设备夜间运载率为目标,扩展了最短作业时间优先规则的内涵,设计了最短设备占有时间优先规则的系列;然后考虑了装配作业车间的装配特性,设计了将作业交货期最早优先规则与提出规则相结合的组合规则.经模具生产车间的仿真实验表明,所设计的组合调度规则对平均延期时间和其他相关评价指标具有较优的结果.     

Nickel silicidation techniques for strained Si1?xGex, Si1?x?yGexCy, and Si1?yCy alloys material-device applications

A nickel silicide process for Si_1-xGe_x, Si_1-x-yGe_xC_y, and Si_1-yC_y alloy materials compatible with Si technology has been developed. Low-resistivity-phase (12–20 μΘ cm) nickel silicides have been obtained for these alloys with different low sheet-resistance temperature windows. The study shows that thin (15–18 nm) silicide layers with high crystalline quality, smooth silicide surface, and smooth interface between silicide and the underlying material are achievable. The technique could be used to combine the benefits of Ni silicide and Si_1-xGe_x, Si_1-x-yGe_xC_y, and Si_1-yC_y alloys. The technique is promising for Si or Si_1-xGe_x, Si_1-x-yGe_xC_y, and Si_1-yC_y alloy-based metal-oxide semiconductor, field-effect transistors (MOSFETs) or other device applications.