Proactive Use of Shared L3 Caches to Enhance Cache Communications in Multi-Core Processors

The software and hardware techniques to exploit the potential of multi-core processors are falling behind, even though the number of cores and cache levels per chip is increasing rapidly. There is no explicit communications support available, and hence inter-core communications depend on cache coherence protocols, resulting in demand-based cache line transfers with their inherent latency and overhead. In this paper, we present Software Controlled Eviction (SCE) to improve the performance of multithreaded applications running on multi-core processors by moving shared data to shared cache levels before it is demanded from remote private caches. Simulation results show that SCE offers significant performance improvement (8-28%) and reduces L3 cache misses by 88-98%.     

Electrical Properties of the Titanium Modified SBN Ceramic System

The electrical properties of the Sr_0.3Ba_0.7Nb₂O₆ system modified with different concentrations of titanium, following the general formula Sr_0.3Ba_0.7Nb_2–y Ti _y O_6–y/2 for charge compensation, are studied. The investigation is carried out in samples prepared by the conventional ceramic method. The X-ray diffraction analysis shows tetragonal tungsten bronze monophasic compounds in all cases. Dielectric measurements show a typical ferroelectric behavior with diffuse phase transition, where the transition temperature and the maximum permittivity decrease with increasing titanium content. The remanent polarization is obtained from hysteresis measurements in the ferroelectric region, while at high temperatures, two processes (a conductive and a ferroelectric process) are overlapping. The diffuse character of the ferroelectric-paraelectric phase transition is also studied and the diffusivity coefficient calculated in all cases.