Increasing amounts of conjugated linoleic acid progressively reduces milk fat synthesis immediately postpartum

Mixed conjugated linoleic acid (CLA) isomers decrease milk fat synthesis during established lactation, but their ability to cause milk fat depression (MFD) immediately postpartum remains unclear. Multiparous Holstein cows (n = 19) were randomly assigned to 1 of 4 doses of rumen-protected (RP) CLA supplements (0, 200, 400, and 600 g/d); each dose provided equal amounts of fatty acids by replacing and balancing treatments with an RP supplement of palm fatty acid distallate. Doses provided a total of 468 g fatty acids/d and 0, 62, 125, or 187 g of mixed CLA isomers/d, respectively. The CLA supplement contained a variety of CLA isomers: 5.4% trans-8, cis-10; 6.3% cis-9, trans-11; 7.9% trans-10, cis-12; and 8.2% cis-11, trans-13 CLA. Each group received treatments from approximately -10 to 21 d relative to calving. To improve palatability and ensure complete consumption, doses were mixed with equal amounts of steam-flaked corn and dried molasses; one-half the supplement was fed at 0600 h, and the remaining supplement was fed at 1800 h. Milk yield and individual feed intake were recorded daily, and milk samples were obtained from each cow every 2nd day (at both milkings) starting on d 1 postpartum. There were no differences in dry matter intake (17.1 kg/d), milk yield (34.2 kg/d), protein content (3.74%), lactose content (4.61%), or yield of milk protein or lactose. The CLA supplementation decreased overall milk fat content in a dose-responsive manner (4.57, 3.97, 3.32, and 3.10, respectively), and milk fat yield displayed the same progressive decline. The dose-dependent decrease in milk fat content was evident during wk 1 and became highly significant during wk 2 and 3. The milk fat yield response pattern was similar, and by d 21, the highest RP-CLA supplement decreased milk fat content and yield by 49 and 56%, respectively. These data clearly indicate RP-CLA can markedly (40 to 50%) induce MFD immediately postpartum without negatively affecting other production parameters.     

Adaptive WTA With an Analog VLSI Neuromorphic Learning Chip

In this paper, we demonstrate how a particular spike-based learning rule (where exact temporal relations between input and output spikes of a spiking model neuron determine the changes of the synaptic weights) can be tuned to express rate-based classical Hebbian learning behavior (where the average input and output spike rates are sufficient to describe the synaptic changes). This shift in behavior is controlled by the input statistic and by a single time constant. The learning rule has been implemented in a neuromorphic very large scale integration (VLSI) chip as part of a neurally inspired spike signal image processing system. The latter is the result of the European Union research project Convolution AER Vision Architecture for Real-Time (CAVIAR). Since it is implemented as a spike-based learning rule (which is most convenient in the overall spike-based system), even if it is tuned to show rate behavior, no explicit long term average signals are computed on the chip. We show the rule's rate-based Hebbian learning ability in a classification task in both simulation and chip experiment, first with artificial stimuli and then with sensor input from the CAVIAR system     

A Gate Leakage Feedback Element in an Adaptive Amplifier Application

This brief presents a method to exploit gate leakage (GL) to create a feedback element for an input offset insensitive and output offset programmable inverting amplifier. Measurements are shown from a test circuit produced in a 90-nm multithreshold CMOS process where a GL element uses thin oxide and a amplifier input stage uses thick oxide. The feedback element has very high nonlinear impedance from about 100 M to several gigaohms depending on the applied voltage, and is suitable for adaptive applications where long time constants (1 ms to 1s) are required and small, slowly wandering offsets can be tolerated.     

Exploiting Gate Leakage in Deep-Submicrometer CMOS for Input Offset Adaptation

Gate leakage that occurs in deep-submicrometer CMOS might be a convenient new way of implementing highly resistive elements with minimal area consumption. We present an adaptive device that exploits gate leakage in the 90-nm STM CMOS process for offset cancellation at its input. This is achieved by a high-pass-filtering input stage with a very low cutoff due to a time constant of approximately 130 ms. In this filter, three 0.1times0.22 mum² gate-oxide structures are used to achieve the equivalent of a 6.5-GOmega resistance     

CAVIAR: A 45k Neuron, 5M Synapse, 12G Connects/s AER Hardware Sensory–Processing– Learning–Actuating System for High-Speed Visual Object Recognition and Tracking

This paper describes CAVIAR, a massively parallel hardware implementation of a spike-based sensing-processing-learning-actuating system inspired by the physiology of the nervous system. CAVIAR uses the asynchronous address-event representation (AER) communication framework and was developed in the context of a European Union funded project. It has four custom mixed-signal AER chips, five custom digital AER interface components, 45 k neurons (spiking cells), up to 5 M synapses, performs 12 G synaptic operations per second, and achieves millisecond object recognition and tracking latencies.