Switching memory cells constructed on plastic substrates with silver selenide nanoparticles

Programmable metallization cell (PMC) memory is a kind of next generation non-volatile memory that has attracted increasing attention in recent years as a possible replacement for flash memory. In spite of the considerable amount of research focused on the fabrication of non-volatile memories on plastic substrates with lightweight, thin, and bendable characteristics, there have been few studies on the fabrication of PCM memory on flexible substrates. In this study, we synthesized Ag₂Se nanoparticles (NPs) by a positive-microemulsion method and constructed PMC memories on plastic substrates with programmable layers formed by the spin-coating of the Ag₂Se NPs. To the best of the knowledge, this is the first attempt to construct PMC memory on plastic substrates by the spin-coating of Ag₂Se NPs. The Ag₂Se NPs synthesized in this study had a uniform size of 2 nm and interestingly showed α-phase (high temperature phase) stability at room temperature. Switching behaviors were observed through the voltage scanning on the fabricated memories with applicable switching voltages. However, the resistance ratios of the off-state to the on-state were quite small. The possible reasons for the α-phase stability of the Ag₂Se NPs at room temperature and the detailed memory characteristics will be described in this article.     

N-channel thin-film transistors constructed on plastic by solution processes of HgSe nanocrystals

We demonstrate bottom-gate thin-film transistors (TFTs) based on solution-processed HgSe nanocrystals (NCs) on plastic substrates. Solid films made of spin-coated HgSe NCs were heated at a temperature of 150 °C for 15 min to maximize the magnitude of their current, and these films were utilized as the channel layers of TFTs. A representative TFT with a bottom-gate Al₂O₃ layer operated as a depletion-mode one with an n-channel, exhibiting a field effect mobility of 3.9 cm²/Vs and an on/off current ratio of about 10². In addition, the electrical characteristics of the TFT on bent substrates are briefly described.     

ZnO nanowire-based nano-floating gate memory with Pt nanocrystals embedded in Al(2)O(3) gate oxides

The memory characteristics of ZnO nanowire-based nano-floating gate memory (NFGM) with Pt nanocrystals acting as the floating gate nodes were investigated in this work. Pt nanocrystals were embedded between Al(2)O(3) tunneling and control oxide layers deposited on ZnO nanowire channels. For a representative ZnO nanowire-based NFGM with embedded Pt nanocrystals, a threshold voltage shift of 3.8?V was observed in its drain current versus gate voltage (I(DS)-V(GS)) measurements for a double sweep of the gate voltage, revealing that the deep effective potential wells built into the nanocrystals provide our NFGM with a large charge storage capacity. Details of the charge storage effect observed in this memory device are discussed in this paper.     

Enhancement of electrical characteristics of electrospun polyaniline nanofibers by embedding the nanofibers with Ga-doped ZnO nanoparticles

Polyaniline nanofibers embedded with undoped ZnO nanoparticles (NPs) or Ga-doped ZnO (ZnO:Ga) NPs were fabricated and their structural and electrical properties were investigated. The uniform distribution of the NPs inside the polyaniline nanofibers was confirmed by transmission electron microscopy analysis. Polyaniline nanofibers embedded with ZnO:Ga-NPs showed their higher conductivities, compared with polyaniline nanofibers embedded with undoped ZnO-NPs. Single nanofibers electrospun from a mixture of a polyaniline solution with a 30 vol% ZnO:Ga-NPs dispersed-solution showed approximately five times higher conductivity than those electrospun from the polyaniline solution alone. This observation indicates that the embedding of the ZnO:Ga-NPs significantly enhances the electrical characteristics of the polyaniline nanofibers.     

Fabrication of arrayed Si nanowire-based nano-floating gate memory devices on flexible plastics

Arrayed Si nanowire (NW)-based nano-floating gate memory (NFGM) devices with Pt nanoparticles (NPs) embedded in Al2O3 gate layers are successfully constructed on flexible plastics by top-down approaches. Ten arrayed Si NW-based NFGM devices are positioned on the first level. Cross-linked poly-4-vinylphenol (PVP) layers are spin-coated on them as isolation layers between the first and second level, and another ten devices are stacked on the cross-linked PVP isolation layers. The electrical characteristics of the representative Si NW-based NFGM devices on the first and second levels exhibit threshold voltage shifts, indicating the trapping and detrapping of electrons in their NPs nodes. They have an average threshold voltage shift of 2.5 V with good retention times of more than 5 x 10(4) s. Moreover, most of the devices successfully retain their electrical characteristics after about one thousand bending cycles. These well-arrayed and stacked Si NW-based NFGM devices demonstrate the potential of nanowire-based devices for large-scale integration.     

Thermoelectric characteristics of nanocomposites made of HgSe and Ag nanoparticles for flexible thermoelectric devices

We synthesized thermoelectric nanocomposites by mixing HgSe nanoparticles (NPs) and Ag NPs in a solution and investigated the thermoelectric properties of the nanocomposite thin films on flexible plastic substrates.The X-ray diffraction patterns and the X-ray photoelectron spectra of the nanocomposites demonstrate that cation-exchange reactions occurred spontaneously in the mixed solution of HgSe and Ag NPs and that the HgSe NPs were completely converted to Ag2Se when the Ag NP content was 20 vol.％.The maximum power factor and the thermoelectric figure of merit were obtained as 75 FμW/mK2 and 0.043 at 300 K,respectively,when the Ag NP content was 10 vol.％,which is 100 times higher than that of HgSe NP thin films.In addition,the mechanical stability of the thermoelectric nanocomposite film was confirmed through repeated bending tests.     

Nanowatt power operation of silicon nanowire NAND logic gates on bendable substrates

In this paper, we propose a novel construction of silicon nanowire (SiNW) negative-AND (NAND) logic gates on bendable plastic substrates and describe their electrical characteristics. The NAND logic gates with SiNW channels are capable of operating with a supply voltage as low as 0.8 V, with switching and standby power consumption of approximately 1.1 and 0.068 nW, respectively. Superior electrical characteristics of each SiNW transistor, including steep subthreshold slopes, high I _on/off ratio, and symmetrical threshold voltages, are the major factors that enable nanowatt-range power operation of the logic gates. Moreover, the mechanical bendability of the logic gates indicates that they have good and stable fatigue properties.

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Necked ZnO nanoparticle-based NO2 sensors with high and fast response

The NO₂ gas sensing characteristics of semiconductor type gas sensors with channels composed of necked ZnO nanoparticles (NPs) were investigated in this study. The heat treatment of the NPs at 400 °C led to their necking and coarsening. The response of the necked-NP-based sensors was as high as 100 when exposed to 0.2 ppm of NO₂ at 200 °C. As the concentration of NO₂ increased to 5 ppm, their response was enhanced to approximately 400. During the repeated injection of NO₂ gas with a concentration of 0.4 ppm, the sensors exhibited stable response characteristics. Furthermore, the 90% response and recovery times of the gas sensor were as fast as 13 and 10 s, respectively. These observations indicate that the non-agglomerated necking of the NPs induced by the heat treatment significantly enhances the gas sensing characteristics of the NP-based gas sensors.     

Reduction of hysteresis in HgSe nanoparticle-based thin-film transistors using blocking oxide layers on plastics

In this study, the hysteresis mechanism is investigated for bottom-gate HgSe nanoparticle (NP)-based thin-film transistors (TFTs) using cross-linked poly vinyl alcohol (PVA) as the gate dielectric on plastics. The hysteresis loop with the clockwise direction is observed and the width of the hysteresis is reduced at long delay times. These phenomena indicate that the origin of the hysteresis is the injection of electrons from the gate electrode to the trap site located in the PVA layer. The widths of the hysteresis curves taken from the TFTs are not reduced even though the annealing treatment for the PVA gate dielectric is performed under N2, O2, and in a vacuum at 120 degrees C for 1 hour. The electron injection from the gate electrode is effectively prevented by inserting Al2O3 of 10 nm utilized as the blocking layer between gate electrode and PVA layer. The hysteresis window is remarkably reduced from about 8 V in HgSe NP-based TFTs without blocking layer to nearly 0 V in the TFTs with blocking layer of Al2O3.