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A report on the IEEE VLSI Test Symposium (VTS 06) panel on "Real-time volume diagnostics: requirements and challenges. 相似文献
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Erik H. Volkerink Ajay Khoche Jochen Rivoir Klaus D. Hilliges 《Journal of Electronic Testing》2003,19(2):125-135
This paper will propose an overall portfolio of different modern test techniques, like reduced pin-count test, SoC multi-site test, low channel cost ATE, test vector compression, bandwidth matching, and advanced probing technologies, to lower the cost of test. The overall economic benefits, the potential synergies, the overall tradeoffs, and the scalability of the benefits of these techniques, are complex to understand and currently not well understood. This problem will be analyzed in this paper by using technical cost modeling. The dependency of the benefits on different applications will be analyzed by modeling the test cost for four different applications. It will be shown that the right match between the application and a combination of the described techniques can result in a significant reduction of the cost of test. Moreover, it will be shown that this optimal match evolves during technology progress and can enable a scalable reduction of the cost of test. 相似文献
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