Histogram modification based enhancement along with contrast-changed image quality assessment

Contrast is the difference in visual characteristics which make an object more recognizable. Despite the significance of contrast enhancement (CE) in image processing applications, few attempts have been made on assessment of the contrast change. In this paper, a visual information fidelity-based contrast change metric (VIF-CCM) is presented which includes visual information fidelity (VIF), local entropy, correlation coefficient, and mean intensity measures. The validation results of the presented VIF-CCM show its efficiency and superiority over the state-of–the-arts image quality assessment metrics. A histogram modification based contrast enhancement (HMCE) method is also proposed in this paper. The proposed HMCE comprises of four steps: segmentation of the input image, employing a set of weighting constraints, applying the combination of adaptive gamma correction and equalization on modified histogram, and optimization the value of the constraint weights by PSO algorithm. Experimental results demonstrate that the proposed HMCE outperforms other existing CE methods subjectively and objectively.

     

Digital multiplier-less implementation of high-precision SDSP and synaptic strength-based STDP

Spiking neural networks (SNNs) can achieve lower latency and higher efficiency compared with traditional neural networks if they are implemented in dedicated neuromorphic hardware. In both biological and artificial spiking neuronal systems, synaptic modifications are the main mechanism for learning. Plastic synapses are thus the core component of neuromorphic hardware with on-chip learning capability. Recently, several research groups have designed hardware architectures for modeling plasticity in SNNs for various applications. Following these research efforts, this paper proposes multiplier-less digital neuromorphic circuits for two plasticity learning rules: the spike-driven synaptic plasticity (SDSP) and synaptic strength–based spike timing–dependent plasticity (SSSTDP). The proposed architectures have increased the precision of the plastic synaptic weights and are suitable for spiking neural network architectures with more precise calculations. The proposed models are validated in MATLAB simulations and physical implementations on a field-programmable gate array (FPGA).     

Immunocytochemical demonstration of reduced glutathione in neurons of rat forebrain

Histochemical studies show reduced glutathione (GSH) in neuroglia, whereas immunocytochemistry of glutaraldehyde-fixed tissue reveals GSH also in neurons. Using an antibody suitable for formaldehyde-fixed tissue, we find GSH staining in the cytoplasm of neurons throughout the brain. Staining was prominent in large pyramidal neurons of cerebral cortex, in basal ganglia, and in reticular and ventrobasal thalamic nuclei.     

High performance implementation of texture features extraction algorithms using FPGA architecture

The most popular second-order statistical texture features are derived from the co-occurrence matrix, which has been proposed by Haralick. However, the computation of both matrix and extracting texture features are very time consuming. In order to improve the performance of co-occurrence matrices and texture feature extraction algorithms, we propose an architecture on FPGA platform. In the proposed architecture, first, the co-occurrence matrix is computed then all thirteen texture features are calculated in parallel using computed co-occurrence matrix. We have implemented the proposed architecture on Virtex 5 fx130T-3 FPGA device. Our experimental results show that a speedup of 421[× yields over a software implementation on Intel Core i7 2.0 GHz processor. In order to improve much more performance on textures, we have reduced the computation of 13 texture features to 3 texture features using ranking of Haralick’s features. The performance improvement is 484×.